On Tue, 05 Dec 2023 17:33:01 +0000, Catalin Marinas <catalin.marinas@xxxxxxx> wrote: > > On Tue, Dec 05, 2023 at 05:01:28PM +0000, Marc Zyngier wrote: > > On Tue, 05 Dec 2023 16:43:18 +0000, > > Jason Gunthorpe <jgg@xxxxxxxxxx> wrote: > > > On Tue, Dec 05, 2023 at 04:22:33PM +0000, Catalin Marinas wrote: > > > > That's an argument to restrict this feature to PCIe. It's really about > > > > fewer arguments on the behaviour of other devices. Marc did raise > > > > another issue with the GIC VCPU interface (does this even have a vma in > > > > the host VMM?). That's a class of devices where the mapping is > > > > context-switched, so the TLBI+DSB rules don't help. > > > > There is no vma. The CPU interface is entirely under control of KVM. > > Userspace only provides the IPA for the mapping. > > That's good to know. We can solve the GIC issue by limiting the > relaxation to those mappings that have a user vma. Yes, this should definitely be part of the decision. > Ideally we should do this for vfio only but we don't have an easy > way to convey this to KVM. But if we want to limit this to PCIe, we'll have to find out. The initial proposal (a long while ago) had a flag conveying some information, and I'd definitely feel more confident having something like that. M. -- Without deviation from the norm, progress is not possible.
