From: Alexandru Elisei <alexandru.elisei@xxxxxxx> Now that the secondaries' stack is linearly mapped, we can set it before turning the MMU on. This makes the entry code for the secondaries consistent with the entry code for the boot CPU. secondary_data is written by the CPU that brings the secondary online with the MMU enabled in the common case (that is, unless the user specifically compiled the tests to run with the MMU disabled), and now it is read by the secondary with the MMU disabled. Data is fetched from PoC by the secondary when the MMU is disabled, clean struct secondary_data to PoC to handle this. Signed-off-by: Alexandru Elisei <alexandru.elisei@xxxxxxx> --- arm/cstart.S | 20 ++++++++++---------- arm/cstart64.S | 16 ++++++++-------- lib/arm/smp.c | 5 +++++ 3 files changed, 23 insertions(+), 18 deletions(-) diff --git a/arm/cstart.S b/arm/cstart.S index 98d61230..090cf38d 100644 --- a/arm/cstart.S +++ b/arm/cstart.S @@ -134,16 +134,6 @@ get_mmu_off: .global secondary_entry secondary_entry: - /* enable the MMU unless requested off */ - bl get_mmu_off - cmp r0, #0 - bne 1f - mov r1, #0 - ldr r0, =mmu_idmap - ldr r0, [r0] - bl asm_mmu_enable - -1: /* * Set the stack, and set up vector table * and exception stacks. Exception stacks @@ -161,6 +151,16 @@ secondary_entry: bl exceptions_init bl enable_vfp + /* enable the MMU unless requested off */ + bl get_mmu_off + cmp r0, #0 + bne 1f + mov r1, #0 + ldr r0, =mmu_idmap + ldr r0, [r0] + bl asm_mmu_enable + +1: /* finish init in C code */ bl secondary_cinit diff --git a/arm/cstart64.S b/arm/cstart64.S index 7fb44f42..b9784d82 100644 --- a/arm/cstart64.S +++ b/arm/cstart64.S @@ -144,6 +144,14 @@ get_mmu_off: .globl secondary_entry secondary_entry: + /* set the stack */ + adrp x0, secondary_data + ldr x0, [x0, :lo12:secondary_data] + and x1, x0, #THREAD_MASK + add x2, x1, #THREAD_SIZE + zero_range x1, x2 + mov sp, x0 + /* Enable FP/ASIMD */ mov x0, #(3 << 20) msr cpacr_el1, x0 @@ -159,14 +167,6 @@ secondary_entry: bl asm_mmu_enable 1: - /* set the stack */ - adrp x0, secondary_data - ldr x0, [x0, :lo12:secondary_data] - and x1, x0, #THREAD_MASK - add x2, x1, #THREAD_SIZE - zero_range x1, x2 - mov sp, x0 - /* finish init in C code */ bl secondary_cinit diff --git a/lib/arm/smp.c b/lib/arm/smp.c index 1d470d1a..c9b247a8 100644 --- a/lib/arm/smp.c +++ b/lib/arm/smp.c @@ -7,6 +7,8 @@ */ #include <libcflat.h> #include <auxinfo.h> + +#include <asm/cacheflush.h> #include <asm/thread_info.h> #include <asm/spinlock.h> #include <asm/cpumask.h> @@ -60,6 +62,9 @@ static void __smp_boot_secondary(int cpu, secondary_entry_fn entry) secondary_data.stack = thread_stack_alloc(); secondary_data.entry = entry; + dcache_clean_poc((unsigned long)&secondary_data, + (unsigned long)&secondary_data + sizeof(secondary_data)); + mmu_mark_disabled(cpu); ret = cpu_psci_cpu_boot(cpu); assert(ret == 0); -- 2.40.1
