On Mon, 18 Sep 2023 18:02:35 +0200 Philippe Mathieu-Daudé <philmd@xxxxxxxxxx> wrote: > QOM objects shouldn't access each other internals fields > except using the QOM API. > > Declare the 'cpu' and 'base-addr' properties, set them > using object_property_set_link() and qdev_prop_set_uint32() > respectively. > > Signed-off-by: Philippe Mathieu-Daudé <philmd@xxxxxxxxxx> Reviewed-by: Igor Mammedov <imammedo@xxxxxxxxxx> > --- > hw/intc/apic_common.c | 2 ++ > target/i386/cpu-sysemu.c | 11 ++++++----- > 2 files changed, 8 insertions(+), 5 deletions(-) > > diff --git a/hw/intc/apic_common.c b/hw/intc/apic_common.c > index 68ad30e2f5..e28f7402ab 100644 > --- a/hw/intc/apic_common.c > +++ b/hw/intc/apic_common.c > @@ -394,6 +394,8 @@ static Property apic_properties_common[] = { > true), > DEFINE_PROP_BOOL("legacy-instance-id", APICCommonState, legacy_instance_id, > false), > + DEFINE_PROP_LINK("cpu", APICCommonState, cpu, TYPE_X86_CPU, X86CPU *), > + DEFINE_PROP_UINT32("base-addr", APICCommonState, apicbase, 0), > DEFINE_PROP_END_OF_LIST(), > }; > > diff --git a/target/i386/cpu-sysemu.c b/target/i386/cpu-sysemu.c > index 6a164d3769..6edfb7e2af 100644 > --- a/target/i386/cpu-sysemu.c > +++ b/target/i386/cpu-sysemu.c > @@ -269,7 +269,6 @@ APICCommonClass *apic_get_class(Error **errp) > > void x86_cpu_apic_create(X86CPU *cpu, Error **errp) > { > - APICCommonState *apic; > APICCommonClass *apic_class = apic_get_class(errp); > > assert(apic_class); > @@ -279,11 +278,13 @@ void x86_cpu_apic_create(X86CPU *cpu, Error **errp) > OBJECT(cpu->apic_state)); > object_unref(OBJECT(cpu->apic_state)); > > + if (!object_property_set_link(OBJECT(cpu->apic_state), "cpu", > + OBJECT(cpu), errp)) { > + return; > + } > qdev_prop_set_uint32(cpu->apic_state, "id", cpu->apic_id); > - /* TODO: convert to link<> */ > - apic = APIC_COMMON(cpu->apic_state); > - apic->cpu = cpu; > - apic->apicbase = APIC_DEFAULT_ADDRESS | MSR_IA32_APICBASE_ENABLE; > + qdev_prop_set_uint32(cpu->apic_state, "base-addr", > + APIC_DEFAULT_ADDRESS | MSR_IA32_APICBASE_ENABLE); > } > > void x86_cpu_apic_realize(X86CPU *cpu, Error **errp)