Under posted MSIs, all device MSIs are multiplexed into a single CPU notification vector. MSI handlers will be de-multiplexed at run-time by system software without IDT delivery. This vector has a priority class below the rest of the system vectors. Potentially, external vector number space for MSIs can be expanded to the entire 0-256 range. Signed-off-by: Jacob Pan <jacob.jun.pan@xxxxxxxxxxxxxxx> --- arch/x86/include/asm/irq_vectors.h | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) diff --git a/arch/x86/include/asm/irq_vectors.h b/arch/x86/include/asm/irq_vectors.h index 3a19904c2db6..077ca38f5a91 100644 --- a/arch/x86/include/asm/irq_vectors.h +++ b/arch/x86/include/asm/irq_vectors.h @@ -99,9 +99,22 @@ #define LOCAL_TIMER_VECTOR 0xec +/* + * Posted interrupt notification vector for all device MSIs delivered to + * the host kernel. + * + * Choose lower priority class bit [7:4] than other system vectors such + * that it can be preempted by the system interrupts. + * + * It is also higher than all external vectors but it should not matter + * in that external vectors for posted MSIs are in a different number space. + */ +#define POSTED_MSI_NOTIFICATION_VECTOR 0xdf #define NR_VECTORS 256 -#ifdef CONFIG_X86_LOCAL_APIC +#ifdef X86_POSTED_MSI +#define FIRST_SYSTEM_VECTOR POSTED_MSI_NOTIFICATION_VECTOR +#elif defined(CONFIG_X86_LOCAL_APIC) #define FIRST_SYSTEM_VECTOR LOCAL_TIMER_VECTOR #else #define FIRST_SYSTEM_VECTOR NR_VECTORS -- 2.25.1
