On Tue, Nov 07, 2023, Sean Christopherson wrote: > @@ -199,6 +219,22 @@ static void guest_test_arch_event(uint8_t idx) > __guest_test_arch_event(idx, gp_event, i, base_pmc_msr + i, > MSR_P6_EVNTSEL0 + i, eventsel); > } > + > + if (!guest_has_perf_global_ctrl) > + return; > + > + fixed_event = intel_event_to_feature[idx].fixed_event; > + if (pmu_is_null_feature(fixed_event) || !this_pmu_has(fixed_event)) > + return; > + > + i = fixed_event.f.bit; > + > + wrmsr(MSR_CORE_PERF_FIXED_CTR_CTRL, FIXED_PMC_CTRL(i, FIXED_PMC_KERNEL)); > + > + __guest_test_arch_event(idx, fixed_event, FIXED_PMC_RDPMC_BASE + i, Grr, this should be an OR, not a SUM, i.e. "FIXED_PMC_RDPMC_BASE | i". That's how Like/Jinrong originally had things, but I got confused by the BASE terminology and "fixed" it. The end result is the name, but the PMU code is hard enough to follow as it is. I'm also going to rename FIXED_PMC_RDPMC_BASE, that is a terrible name that got copy+pasted from perf. It's not a base value, it's a single flag that says "read fixed counters".
