The base register address offset is *signed*.
Cc: qemu-stable@xxxxxxxxxx
Fixes: aaaa82a9f9 ("target/mips/tx79: Introduce LQ opcode (Load Quadword)")
Signed-off-by: Philippe Mathieu-Daudé <philmd@xxxxxxxxxx>
Reviewed-by: Richard Henderson <richard.henderson@xxxxxxxxxx>
Message-Id: <20230914090447.12557-1-philmd@xxxxxxxxxx>
---
target/mips/tcg/tx79.decode | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/mips/tcg/tx79.decode b/target/mips/tcg/tx79.decode
index 57d87a2076..578b8c54c0 100644
--- a/target/mips/tcg/tx79.decode
+++ b/target/mips/tcg/tx79.decode
@@ -24,7 +24,7 @@
@rs ...... rs:5 ..... .......... ...... &r sa=0 rt=0 rd=0
@rd ...... .......... rd:5 ..... ...... &r sa=0 rs=0 rt=0
-@ldst ...... base:5 rt:5 offset:16 &i
+@ldst ...... base:5 rt:5 offset:s16 &i
###########################################################################
--
2.41.0
