On Tue, 2023-10-10 at 20:02 +0000, John Allen wrote: > Set up interception of shadow stack MSRs. In the event that shadow stack > is unsupported on the host or the MSRs are otherwise inaccessible, the > interception code will return an error. In certain circumstances such as > host initiated MSR reads or writes, the interception code will get or > set the requested MSR value. > > Signed-off-by: John Allen <john.allen@xxxxxxx> > --- > arch/x86/kvm/svm/svm.c | 18 ++++++++++++++++++ > 1 file changed, 18 insertions(+) > > diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c > index f283eb47f6ac..6a0d225311bc 100644 > --- a/arch/x86/kvm/svm/svm.c > +++ b/arch/x86/kvm/svm/svm.c > @@ -2859,6 +2859,15 @@ static int svm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info) > if (guest_cpuid_is_intel(vcpu)) > msr_info->data |= (u64)svm->sysenter_esp_hi << 32; > break; > + case MSR_IA32_S_CET: > + msr_info->data = svm->vmcb->save.s_cet; > + break; > + case MSR_IA32_INT_SSP_TAB: > + msr_info->data = svm->vmcb->save.isst_addr; > + break; > + case MSR_KVM_SSP: > + msr_info->data = svm->vmcb->save.ssp; > + break; > case MSR_TSC_AUX: > msr_info->data = svm->tsc_aux; > break; > @@ -3085,6 +3094,15 @@ static int svm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr) > svm->vmcb01.ptr->save.sysenter_esp = (u32)data; > svm->sysenter_esp_hi = guest_cpuid_is_intel(vcpu) ? (data >> 32) : 0; > break; > + case MSR_IA32_S_CET: > + svm->vmcb->save.s_cet = data; > + break; > + case MSR_IA32_INT_SSP_TAB: > + svm->vmcb->save.isst_addr = data; > + break; > + case MSR_KVM_SSP: > + svm->vmcb->save.ssp = data; > + break; > case MSR_TSC_AUX: > /* > * TSC_AUX is usually changed only during boot and never read Looks good, except that if my complaint about turning the fake 'MSR_KVM_SSP' into a first class register with an ioctl to load/save it is accepted, then there will be a new vendor callback to read/write it instead of doing it in svm_get_msr/svm_set_msr. Besides this, Reviewed-by: Maxim Levitsky <mlevitsk@xxxxxxxxxx> Best regards, Maxim Levitsky
