On Tue, Oct 17, 2023 at 11:20:39AM +0800, Tina Zhang wrote: > Devices attached to shared virtual addressing (SVA) domain are allowed to > use the same virtual addresses with processor, and this functionality is > called shared virtual memory. When shared virtual memory is being used, > it's the sva domain's responsibility to keep device TLB cache and the CPU > cache in sync. Hence add mmu_notifier to sva domain. > > Signed-off-by: Tina Zhang <tina.zhang@xxxxxxxxx> > --- > include/linux/iommu.h | 2 ++ > 1 file changed, 2 insertions(+) You should look at how arm smmuv3 ended up after I went over it to make similar changes, I think you should take this patch https://lore.kernel.org/linux-iommu/20-v1-afbb86647bbd+5-smmuv3_newapi_p2_jgg@xxxxxxxxxx/ into this series (maybe drop the arm part) And copy the same basic structure for how the mmu notifier works. It would also be nice if alot of the 'if_sva' tests could be avoided, smmu didn't end up with those.. In the guts of the pasid handling sva shouldn't be special beyond a different source for the pgd. Jason
