On Sat, Oct 14, 2023 at 1:48 AM Sean Christopherson <seanjc@xxxxxxxxxx> wrote: > > Please pull three PMU fixes for 6.6. These aren't super urgent and have all > existed from some time, i.e. don't absolutely need to go into 6.6, but I also > don't see a good reason to hold them back (they're all tagged for stable, so > it's kind of a moot point). Pulled, thanks. Paolo > The following changes since commit 5804c19b80bf625c6a9925317f845e497434d6d3: > > Merge tag 'kvm-riscv-fixes-6.6-1' of https://github.com/kvm-riscv/linux into HEAD (2023-09-23 05:35:55 -0400) > > are available in the Git repository at: > > https://github.com/kvm-x86/linux.git tags/kvm-x86-pmu-6.6-fixes > > for you to fetch changes up to 73554b29bd70546c1a9efc9c160641ef1b849358: > > KVM: x86/pmu: Synthesize at most one PMI per VM-exit (2023-09-25 14:42:52 -0700) > > ---------------------------------------------------------------- > KVM x86/pmu fixes for 6.6: > > - Truncate writes to PMU counters to the counter's width to avoid spurious > overflows when emulating counter events in software. > > - Set the LVTPC entry mask bit when handling a PMI (to match Intel-defined > architectural behavior). > > - Treat KVM_REQ_PMI as a wake event instead of queueing host IRQ work to > kick the guest out of emulated halt. > > ---------------------------------------------------------------- > Jim Mattson (2): > KVM: x86: Mask LVTPC when handling a PMI > KVM: x86/pmu: Synthesize at most one PMI per VM-exit > > Roman Kagan (1): > KVM: x86/pmu: Truncate counter value to allowed width on write > > arch/x86/include/asm/kvm_host.h | 1 - > arch/x86/kvm/lapic.c | 8 ++++++-- > arch/x86/kvm/pmu.c | 27 +-------------------------- > arch/x86/kvm/pmu.h | 6 ++++++ > arch/x86/kvm/svm/pmu.c | 2 +- > arch/x86/kvm/vmx/pmu_intel.c | 4 ++-- > arch/x86/kvm/x86.c | 3 +++ > 7 files changed, 19 insertions(+), 32 deletions(-) >
