On Sun, Oct 08, 2023 at 01:52:54AM +0530, ankita@xxxxxxxxxx wrote: > PCI BAR are aligned to the power-of-2, but the actual memory on the > device may not. A read or write access to the physical address from the > last device PFN up to the next power-of-2 aligned physical address > results in reading ~0 and dropped writes. > Reading garbage or padding in that case? Confused... -- An old man doll... just what I always wanted! - Clara
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