On 10/3/23 17:20, Jim Mattson wrote: > Define an X86_FEATURE_* flag for > CPUID.80000021H:EAX.FsGsKernelGsBaseNonSerializing[bit 1], and > advertise the feature to userspace via KVM_GET_SUPPORTED_CPUID. ... > +#define X86_FEATURE_BASES_NON_SERIAL (20*32+ 1) /* "" FSBASE, GSBASE, and KERNELGSBASE are non-serializing */ This is failing to differentiate two *VERY* different things. FSBASE, GSBASE, and KERNELGSBASE themselves are registers. They have *NOTHING* to do with serialization. WRFSBASE, for instance is not serializing. Reading (with RDMSR) or using any of those three registers is not serializing. The *ONLY* thing that relates them to serialization is the WRMSR instruction which itself is (mostly) architecturally serializing and the fact that WRMSR has historically been the main way to write those three registers. The AMD docs call this out, which helps. But the changelog, comments and probably the feature naming need some work. Why does this matter, btw? Why do guests need this bit passed through?
