Change AVIC's code to use vcpu->loaded and vcpu->cpu instead of reading
back the cpu and 'is_running' bit from the avic's physical id entry.
Once AVIC's IPI virtualization is made optional, the 'is_running'
bit might always be false regardless if a vCPU is running or not.
Signed-off-by: Maxim Levitsky <mlevitsk@xxxxxxxxxx>
---
arch/x86/kvm/svm/avic.c | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/x86/kvm/svm/avic.c b/arch/x86/kvm/svm/avic.c
index 4c75ca15999fcd4..bdab28005ad3405 100644
--- a/arch/x86/kvm/svm/avic.c
+++ b/arch/x86/kvm/svm/avic.c
@@ -791,7 +791,6 @@ static int svm_ir_list_add(struct vcpu_svm *svm, struct amd_iommu_pi_data *pi)
int ret = 0;
unsigned long flags;
struct amd_svm_iommu_ir *ir;
- u64 entry;
/**
* In some cases, the existing irte is updated and re-set,
@@ -832,10 +831,11 @@ static int svm_ir_list_add(struct vcpu_svm *svm, struct amd_iommu_pi_data *pi)
* will update the pCPU info when the vCPU awkened and/or scheduled in.
* See also avic_vcpu_load().
*/
- entry = READ_ONCE(*(svm->avic_physical_id_cache));
- if (entry & AVIC_PHYSICAL_ID_ENTRY_IS_RUNNING_MASK)
- amd_iommu_update_ga(entry & AVIC_PHYSICAL_ID_ENTRY_HOST_PHYSICAL_ID_MASK,
- true, pi->ir_data);
+ if (READ_ONCE(svm->vcpu.loaded)) {
+ /* Ensure that the vcpu->loaded is read before the vcpu->cpu */
+ smp_rmb();
+ amd_iommu_update_ga(READ_ONCE(svm->vcpu.cpu), true, pi->ir_data);
+ }
list_add(&ir->node, &svm->ir_list);
spin_unlock_irqrestore(&svm->ir_list_lock, flags);
--
2.26.3
