On Thu, 14 Sep 2023 13:55:04 +0800, Tao Su wrote:
> When IPI virtualization is enabled, a WARN is triggered if bit12 of ICR
> MSR is set after APIC-write VM-exit. The reason is kvm_apic_send_ipi()
> thinks the APIC_ICR_BUSY bit should be cleared because KVM has no delay,
> but kvm_apic_write_nodecode() doesn't clear the APIC_ICR_BUSY bit.
>
> Under the x2APIC section, regarding ICR, the SDM says:
>
> [...]
Applied to kvm-x86 vmx. I dropped the TODO and replaced with an explanation of
why the "extra" write is necessary, and why trying to avoid it isn't worth
"fixing".
Thanks!
[1/1] KVM: x86: Clear bit12 of ICR after APIC-write VM-exit
https://github.com/kvm-x86/linux/commit/629d3698f695
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https://github.com/kvm-x86/linux/tree/next
