When looking at the arm_cpu_realizefn() method, most of the code run before the cpu_exec_realizefn() call checks whether the requested CPU features are compatible with the requested accelerator. Extract this code to a dedicated handler matching our recently added CPUClass::verify_accel_features() handler. Signed-off-by: Philippe Mathieu-Daudé <philmd@xxxxxxxxxx> --- target/arm/cpu.c | 41 ++++++++++++++++++++++++----------------- 1 file changed, 24 insertions(+), 17 deletions(-) diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 46d3f70d63..a551383fd3 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -1675,19 +1675,10 @@ void arm_cpu_finalize_features(ARMCPU *cpu, Error **errp) } } -static void arm_cpu_realizefn(DeviceState *dev, Error **errp) +static bool arm_cpu_verify_accel_features(CPUState *cs, Error **errp) { - CPUState *cs = CPU(dev); - ARMCPU *cpu = ARM_CPU(dev); - ARMCPUClass *acc = ARM_CPU_GET_CLASS(dev); + ARMCPU *cpu = ARM_CPU(cs); CPUARMState *env = &cpu->env; - int pagebits; - Error *local_err = NULL; - - /* Use pc-relative instructions in system-mode */ -#ifndef CONFIG_USER_ONLY - cs->tcg_cflags |= CF_PCREL; -#endif /* If we needed to query the host kernel for the CPU features * then it's possible that might have failed in the initfn, but @@ -1699,10 +1690,13 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp) } else { error_setg(errp, "Failed to retrieve host CPU features"); } - return; + return false; } #ifndef CONFIG_USER_ONLY + /* Use pc-relative instructions in system-mode */ + cs->tcg_cflags |= CF_PCREL; + /* The NVIC and M-profile CPU are two halves of a single piece of * hardware; trying to use one without the other is a command line * error and will result in segfaults if not caught here. @@ -1710,12 +1704,12 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp) if (arm_feature(env, ARM_FEATURE_M)) { if (!env->nvic) { error_setg(errp, "This board cannot be used with Cortex-M CPUs"); - return; + return false; } } else { if (env->nvic) { error_setg(errp, "This board can only be used with Cortex-M CPUs"); - return; + return false; } } @@ -1733,23 +1727,35 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp) error_setg(errp, "Cannot enable %s when using an M-profile guest CPU", current_accel_name()); - return; + return false; } if (cpu->has_el3) { error_setg(errp, "Cannot enable %s when guest CPU has EL3 enabled", current_accel_name()); - return; + return false; } if (cpu->tag_memory) { error_setg(errp, "Cannot enable %s when guest CPUs has MTE enabled", current_accel_name()); - return; + return false; } } #endif + return true; +} + +static void arm_cpu_realizefn(DeviceState *dev, Error **errp) +{ + CPUState *cs = CPU(dev); + ARMCPU *cpu = ARM_CPU(dev); + ARMCPUClass *acc = ARM_CPU_GET_CLASS(dev); + CPUARMState *env = &cpu->env; + int pagebits; + Error *local_err = NULL; + cpu_exec_realizefn(cs, &local_err); if (local_err != NULL) { error_propagate(errp, local_err); @@ -2383,6 +2389,7 @@ static void arm_cpu_class_init(ObjectClass *oc, void *data) &acc->parent_phases); cc->class_by_name = arm_cpu_class_by_name; + cc->verify_accel_features = arm_cpu_verify_accel_features; cc->has_work = arm_cpu_has_work; cc->dump_state = arm_cpu_dump_state; cc->set_pc = arm_cpu_set_pc; -- 2.41.0