Re: [PATCH V11 00/17] riscv: Add Native/Paravirt qspinlock support

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On Sun, Sep 10, 2023 at 05:16:46PM +0800, Guo Ren wrote:
> On Sun, Sep 10, 2023 at 4:58 PM Conor Dooley <conor@xxxxxxxxxx> wrote:
> >
> > On Sun, Sep 10, 2023 at 04:28:54AM -0400, guoren@xxxxxxxxxx wrote:
> >
> > > Changlog:
> > > V11:
> > >  - Based on Leonardo Bras's cmpxchg_small patches v5.
> > >  - Based on Guo Ren's Optimize arch_spin_value_unlocked patch v3.
> > >  - Remove abusing alternative framework and use jump_label instead.
> >
> > btw, I didn't say that using alternatives was the problem, it was
> > abusing the errata framework to perform feature detection that I had
> > a problem with. That's not changed in v11.
> I've removed errata feature detection. The only related patches are:
>  - riscv: qspinlock: errata: Add ERRATA_THEAD_WRITE_ONCE fixup
>  - riscv: qspinlock: errata: Enable qspinlock for T-HEAD processors
> 
> Which one is your concern? Could you reply on the exact patch thread? Thx.

riscv: qspinlock: errata: Enable qspinlock for T-HEAD processors

Please go back and re-read the comments I left on v11 about using the
errata code for feature detection.

> > A stronger forward progress guarantee is not an erratum, AFAICT.

> Sorry, there is no erratum of "stronger forward progress guarantee" in the V11.

"riscv: qspinlock: errata: Enable qspinlock for T-HEAD processors" still
uses the errata framework to detect the presence of the stronger forward
progress guarantee in v11.

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