We only set DBM if the page is writeable (S2AP[1] == 1). But once migration
starts, CLEAR_LOG path will write protect the pages (S2AP[1] = 0) and there
isn't an easy way to differentiate the writeable pages that gets write
protected from read-only pages as we only have S2AP[1] bit to check.
Introduced a ctx->flag KVM_PGTABLE_WALK_WC_HINT to identify the dirty page
tracking related write-protect page table walk and used one of the "Reserved
for software use" bit in page descriptor to mark a page as "writeable-clean".
Signed-off-by: Shameer Kolothum <shameerali.kolothum.thodi@xxxxxxxxxx>
---
arch/arm64/include/asm/kvm_pgtable.h | 5 +++++
arch/arm64/kvm/hyp/pgtable.c | 25 ++++++++++++++++++++++---
2 files changed, 27 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/include/asm/kvm_pgtable.h b/arch/arm64/include/asm/kvm_pgtable.h
index a12add002b89..67bcbc5984f9 100644
--- a/arch/arm64/include/asm/kvm_pgtable.h
+++ b/arch/arm64/include/asm/kvm_pgtable.h
@@ -190,6 +190,8 @@ enum kvm_pgtable_prot {
#define KVM_PGTABLE_PROT_RW (KVM_PGTABLE_PROT_R | KVM_PGTABLE_PROT_W)
#define KVM_PGTABLE_PROT_RWX (KVM_PGTABLE_PROT_RW | KVM_PGTABLE_PROT_X)
+#define KVM_PGTABLE_PROT_WC KVM_PGTABLE_PROT_SW0 /*write-clean*/
+
#define PKVM_HOST_MEM_PROT KVM_PGTABLE_PROT_RWX
#define PKVM_HOST_MMIO_PROT KVM_PGTABLE_PROT_RW
@@ -221,6 +223,8 @@ typedef bool (*kvm_pgtable_force_pte_cb_t)(u64 addr, u64 end,
* operations required.
* @KVM_PGTABLE_WALK_HW_DBM: Indicates that the attribute update is
* HW DBM related.
+ * @KVM_PGTABLE_WALK_WC_HINT: Update the page as writeable-clean(software attribute)
+ * if we are write protecting a writeable page.
*/
enum kvm_pgtable_walk_flags {
KVM_PGTABLE_WALK_LEAF = BIT(0),
@@ -231,6 +235,7 @@ enum kvm_pgtable_walk_flags {
KVM_PGTABLE_WALK_SKIP_BBM_TLBI = BIT(5),
KVM_PGTABLE_WALK_SKIP_CMO = BIT(6),
KVM_PGTABLE_WALK_HW_DBM = BIT(7),
+ KVM_PGTABLE_WALK_WC_HINT = BIT(8),
};
struct kvm_pgtable_visit_ctx {
diff --git a/arch/arm64/kvm/hyp/pgtable.c b/arch/arm64/kvm/hyp/pgtable.c
index d7a46a00a7f6..4552bfb1f274 100644
--- a/arch/arm64/kvm/hyp/pgtable.c
+++ b/arch/arm64/kvm/hyp/pgtable.c
@@ -69,6 +69,11 @@ struct kvm_pgtable_walk_data {
const u64 end;
};
+static bool kvm_pgtable_walk_wc_hint(const struct kvm_pgtable_visit_ctx *ctx)
+{
+ return ctx->flags & KVM_PGTABLE_WALK_WC_HINT;
+}
+
static bool kvm_pgtable_walk_hw_dbm(const struct kvm_pgtable_visit_ctx *ctx)
{
return ctx->flags & KVM_PGTABLE_WALK_HW_DBM;
@@ -771,13 +776,24 @@ static bool stage2_pte_writeable(kvm_pte_t pte)
return pte & KVM_PTE_LEAF_ATTR_LO_S2_S2AP_W;
}
+static bool stage2_pte_is_write_clean(kvm_pte_t pte)
+{
+ return kvm_pte_valid(pte) && (pte & KVM_PGTABLE_PROT_WC);
+}
+
+static bool stage2_pte_can_be_write_clean(const struct kvm_pgtable_visit_ctx *ctx,
+ kvm_pte_t new)
+{
+ return (stage2_pte_writeable(ctx->old) && !stage2_pte_writeable(new));
+}
+
static void kvm_update_hw_dbm(const struct kvm_pgtable_visit_ctx *ctx,
kvm_pte_t new)
{
kvm_pte_t old_pte, pte = ctx->old;
- /* Only set DBM if page is writeable */
- if ((new & KVM_PTE_LEAF_ATTR_HI_S2_DBM) && !stage2_pte_writeable(pte))
+ /* Only set DBM if page is writeable-clean */
+ if ((new & KVM_PTE_LEAF_ATTR_HI_S2_DBM) && !stage2_pte_is_write_clean(pte))
return;
/* Clear DBM walk is not shared, update */
@@ -805,6 +821,9 @@ static bool stage2_try_set_pte(const struct kvm_pgtable_visit_ctx *ctx, kvm_pte_
}
if (!kvm_pgtable_walk_shared(ctx)) {
+ if (kvm_pgtable_walk_wc_hint(ctx) &&
+ stage2_pte_can_be_write_clean(ctx, new))
+ new |= KVM_PGTABLE_PROT_WC;
WRITE_ONCE(*ctx->ptep, new);
return true;
}
@@ -1306,7 +1325,7 @@ int kvm_pgtable_stage2_wrprotect(struct kvm_pgtable *pgt, u64 addr, u64 size)
{
return stage2_update_leaf_attrs(pgt, addr, size, 0,
KVM_PTE_LEAF_ATTR_LO_S2_S2AP_W,
- NULL, NULL, 0);
+ NULL, NULL, KVM_PGTABLE_WALK_WC_HINT);
}
kvm_pte_t kvm_pgtable_stage2_mkyoung(struct kvm_pgtable *pgt, u64 addr)
--
2.34.1
