Hi Marc, > On 28 Jul 2023, at 08:29, Marc Zyngier <maz@xxxxxxxxxx> wrote: > > Add the missing VA-based CMOs encodings. > > Reviewed-by: Eric Auger <eric.auger@xxxxxxxxxx> > Signed-off-by: Marc Zyngier <maz@xxxxxxxxxx> > --- > arch/arm64/include/asm/sysreg.h | 26 ++++++++++++++++++++++++++ > 1 file changed, 26 insertions(+) > > diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h > index b481935e9314..85447e68951a 100644 > --- a/arch/arm64/include/asm/sysreg.h > +++ b/arch/arm64/include/asm/sysreg.h > @@ -124,6 +124,32 @@ > #define SYS_DC_CIGSW sys_insn(1, 0, 7, 14, 4) > #define SYS_DC_CIGDSW sys_insn(1, 0, 7, 14, 6) > > +#define SYS_IC_IALLUIS sys_insn(1, 0, 7, 1, 0) > +#define SYS_IC_IALLU sys_insn(1, 0, 7, 5, 0) > +#define SYS_IC_IVAU sys_insn(1, 3, 7, 5, 1) > + > +#define SYS_DC_IVAC sys_insn(1, 0, 7, 6, 1) > +#define SYS_DC_IGVAC sys_insn(1, 0, 7, 6, 3) > +#define SYS_DC_IGDVAC sys_insn(1, 0, 7, 6, 5) > + > +#define SYS_DC_CVAC sys_insn(1, 3, 7, 10, 1) > +#define SYS_DC_CGVAC sys_insn(1, 3, 7, 10, 3) > +#define SYS_DC_CGDVAC sys_insn(1, 3, 7, 10, 5) > + > +#define SYS_DC_CVAU sys_insn(1, 3, 7, 11, 1) > + > +#define SYS_DC_CVAP sys_insn(1, 3, 7, 12, 1) > +#define SYS_DC_CGVAP sys_insn(1, 3, 7, 12, 3) > +#define SYS_DC_CGDVAP sys_insn(1, 3, 7, 12, 5) > + > +#define SYS_DC_CVADP sys_insn(1, 3, 7, 13, 1) > +#define SYS_DC_CGVADP sys_insn(1, 3, 7, 13, 3) > +#define SYS_DC_CGDVADP sys_insn(1, 3, 7, 13, 5) > + > +#define SYS_DC_CIVAC sys_insn(1, 3, 7, 14, 1) > +#define SYS_DC_CIGVAC sys_insn(1, 3, 7, 14, 3) > +#define SYS_DC_CIGDVAC sys_insn(1, 3, 7, 14, 5) > + Reviewed-by: Miguel Luis <miguel.luis@xxxxxxxxxx> Thanks Miguel > /* > * Automatically generated definitions for system registers, the > * manual encodings below are in the process of being converted to > -- > 2.34.1 >
