On 7/12/23 16:57, Marc Zyngier wrote:
> The HFGxTR_EL2 fields do not always follow the naming described
> in the spec, nor do they match the name of the register they trap
> in the rest of the kernel.
>
> It is a bit sad that they were written by hand despite the availability
> of a machine readable version...
>
> Fixes: cc077e7facbe ("arm64/sysreg: Convert HFG[RW]TR_EL2 to automatic generation")
> Signed-off-by: Marc Zyngier <maz@xxxxxxxxxx>
> Reviewed-by: Mark Brown <broonie@xxxxxxxxxx>
> Cc: Will Deacon <will@xxxxxxxxxx>
> Cc: Catalin Marinas <catalin.marinas@xxxxxxx>
> Cc: Mark Rutland <mark.rutland@xxxxxxx>
> ---
> arch/arm64/tools/sysreg | 12 ++++++------
> 1 file changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
> index 1ea4a3dc68f8..65866bf819c3 100644
> --- a/arch/arm64/tools/sysreg
> +++ b/arch/arm64/tools/sysreg
> @@ -2017,7 +2017,7 @@ Field 0 SM
> EndSysreg
>
> SysregFields HFGxTR_EL2
> -Field 63 nAMIAIR2_EL1
> +Field 63 nAMAIR2_EL1
> Field 62 nMAIR2_EL1
> Field 61 nS2POR_EL1
> Field 60 nPOR_EL1
> @@ -2032,9 +2032,9 @@ Field 52 nGCS_EL0
> Res0 51
> Field 50 nACCDATA_EL1
> Field 49 ERXADDR_EL1
> -Field 48 EXRPFGCDN_EL1
> -Field 47 EXPFGCTL_EL1
> -Field 46 EXPFGF_EL1
> +Field 48 ERXPFGCDN_EL1
> +Field 47 ERXPFGCTL_EL1
> +Field 46 ERXPFGF_EL1
> Field 45 ERXMISCn_EL1
> Field 44 ERXSTATUS_EL1
> Field 43 ERXCTLR_EL1
> @@ -2049,8 +2049,8 @@ Field 35 TPIDR_EL0
> Field 34 TPIDRRO_EL0
> Field 33 TPIDR_EL1
> Field 32 TCR_EL1
> -Field 31 SCTXNUM_EL0
> -Field 30 SCTXNUM_EL1
> +Field 31 SCXTNUM_EL0
> +Field 30 SCXTNUM_EL1
> Field 29 SCTLR_EL1
> Field 28 REVIDR_EL1
> Field 27 PAR_EL1
Reviewed-by: Eric Auger <eric.auger@xxxxxxxxxx>
Eric
