AMD IOMMU Extended Feature(2) Register (EFR/EFR2) specifies features
supported by each IOMMU hardware instance. The IOMMU driver checks each
feature-specific bits before enabling each feature at run time.
For hardware-assisted vIOMMU, the hypervisor determines which IOMMU
features to supported in the guest, and communicates this information
to user-space (e.g. QEMU) via iommufd IOMMU_DEVICE_GET_HW_INFO ioctl.
Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@xxxxxxx>
---
drivers/iommu/amd/amd_iommu.h | 2 ++
drivers/iommu/amd/amd_iommu_types.h | 3 +++
drivers/iommu/amd/iommu.c | 37 +++++++++++++++++++++++++++++
include/uapi/linux/iommufd.h | 11 +++++++++
4 files changed, 53 insertions(+)
diff --git a/drivers/iommu/amd/amd_iommu.h b/drivers/iommu/amd/amd_iommu.h
index d36a39796c2f..c9dfa4734801 100644
--- a/drivers/iommu/amd/amd_iommu.h
+++ b/drivers/iommu/amd/amd_iommu.h
@@ -84,6 +84,8 @@ extern int amd_iommu_domain_set_gcr3(struct iommu_domain *dom, u32 pasid,
unsigned long cr3);
extern int amd_iommu_domain_clear_gcr3(struct iommu_domain *dom, u32 pasid);
+extern void amd_iommu_build_efr(u64 *efr, u64 *efr2);
+
#ifdef CONFIG_IRQ_REMAP
extern int amd_iommu_create_irq_domain(struct amd_iommu *iommu);
#else
diff --git a/drivers/iommu/amd/amd_iommu_types.h b/drivers/iommu/amd/amd_iommu_types.h
index 09df25779fe9..8830f511bee4 100644
--- a/drivers/iommu/amd/amd_iommu_types.h
+++ b/drivers/iommu/amd/amd_iommu_types.h
@@ -98,12 +98,15 @@
#define FEATURE_EPHSUP (1ULL<<50)
#define FEATURE_SNP (1ULL<<63)
+#define FEATURE_GATS_5LEVEL 1ULL
#define FEATURE_GATS_SHIFT 12
#define FEATURE_GATS_MASK (0x03ULL << FEATURE_GATS_SHIFT)
+#define FEATURE_GLX_3LEVEL 0ULL
#define FEATURE_GLX_SHIFT 14
#define FEATURE_GLX_MASK (0x03ULL << FEATURE_GLX_SHIFT)
+#define FEATURE_PASMAX_16 0xFULL
#define FEATURE_PASMAX_SHIFT 32
#define FEATURE_PASMAX_MASK (0x1FULL << FEATURE_PASMAX_SHIFT)
diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c
index c23f99ebdffc..4a42af85664e 100644
--- a/drivers/iommu/amd/iommu.c
+++ b/drivers/iommu/amd/iommu.c
@@ -2435,8 +2435,45 @@ static bool amd_iommu_enforce_cache_coherency(struct iommu_domain *domain)
return true;
}
+void amd_iommu_build_efr(u64 *efr, u64 *efr2)
+{
+ if (efr) {
+ *efr = (FEATURE_GT | FEATURE_GIOSUP);
+
+ /* 5-level v2 page table support */
+ *efr |= ((FEATURE_GATS_5LEVEL << FEATURE_GATS_SHIFT) &
+ FEATURE_GATS_MASK);
+
+ /* 3-level GCR3 table support */
+ *efr |= ((FEATURE_GLX_3LEVEL << FEATURE_GLX_SHIFT) &
+ FEATURE_GLX_MASK);
+
+ /* 16-bit PASMAX support */
+ *efr |= ((FEATURE_PASMAX_16 << FEATURE_PASMAX_SHIFT) &
+ FEATURE_PASMAX_MASK);
+ }
+
+ if (efr2)
+ *efr2 = 0;
+}
+
+static void *amd_iommu_hw_info(struct device *dev, u32 *length)
+{
+ struct iommu_hw_info_amd *hwinfo;
+
+ hwinfo = kzalloc(sizeof(*hwinfo), GFP_KERNEL);
+ if (!hwinfo)
+ return ERR_PTR(-ENOMEM);
+
+ *length = sizeof(*hwinfo);
+
+ amd_iommu_build_efr(&hwinfo->efr, &hwinfo->efr2);
+ return hwinfo;
+}
+
const struct iommu_ops amd_iommu_ops = {
.capable = amd_iommu_capable,
+ .hw_info = amd_iommu_hw_info,
.domain_alloc = amd_iommu_domain_alloc,
.probe_device = amd_iommu_probe_device,
.release_device = amd_iommu_release_device,
diff --git a/include/uapi/linux/iommufd.h b/include/uapi/linux/iommufd.h
index ec870e2d32fd..f8ea9faf6770 100644
--- a/include/uapi/linux/iommufd.h
+++ b/include/uapi/linux/iommufd.h
@@ -508,6 +508,17 @@ struct iommu_hw_info_smmuv3 {
__u32 idr[6];
};
+/**
+ * struct iommu_hw_info_amd - AMD IOMMU device info
+ *
+ * @efr : Value of AMD IOMMU Extended Feature Register (EFR)
+ * @efr2: Value of AMD IOMMU Extended Feature 2 Register (EFR2)
+ */
+struct iommu_hw_info_amd {
+ __u64 efr;
+ __u64 efr2;
+};
+
/**
* enum iommu_hw_info_type - IOMMU Hardware Info Types
* @IOMMU_HW_INFO_TYPE_INTEL_VTD: Intel VT-d iommu info type
--
2.34.1
