On Tue, Jun 20, 2023 at 11:34:43AM +0800, Chao Gao wrote: > On Tue, Jun 20, 2023 at 10:34:29AM +0800, Yan Zhao wrote: > >On Tue, Jun 20, 2023 at 10:42:57AM +0800, Chao Gao wrote: > >> On Fri, Jun 16, 2023 at 10:38:15AM +0800, Yan Zhao wrote: > >> >For KVM_X86_QUIRK_CD_NW_CLEARED, remove the ignore PAT bit in EPT memory > >> >types when cache is disabled and non-coherent DMA are present. > >> > > >> >With the quirk KVM_X86_QUIRK_CD_NW_CLEARED, WB + IPAT are returned as the > >> >EPT memory type when guest cache is disabled before this patch. > >> >Removing the IPAT bit in this patch will allow effective memory type to > >> >honor PAT values as well, which will make the effective memory type > >> > >> Given guest sets CR0.CD, what's the point of honoring (guest) PAT? e.g., > >> which guests can benefit from this change? > >This patch is actually a preparation for later patch 10 to implement > >fine-grained zap. > >If when CR0.CD=1 the EPT type is WB + IPAT, and > >when CR0.CD=0 + mtrr enabled, EPT type is WB or UC or ..., which are > >without IPAT, then we have to always zap all EPT entries. > > OK. The goal is to reduce the cost of toggling CR0.CD. The key is if KVM sets > the IPAT, then when CR0.CD is cleared by guest, KVM has to zap _all_ EPT entries > at least to clear IPAT. > > Can kvm honor guest MTRRs as well when CR0.CD=1 && with the quirk? then later > clearing CR0.CD needn't zap _any_ EPT entry. But the optimization is exactly the > one removed in patch 6. Maybe I miss something important. I replied it in another mail.
