+KVM
On Wed, May 17, 2023, Like Xu wrote:
> From: Like Xu <likexu@xxxxxxxxxxx>
>
> After commit b752ea0c28e3 ("perf/x86/intel/ds: Flush PEBS DS when changing
> PEBS_DATA_CFG"), the cpuc->pebs_data_cfg may save some bits that are not
> supported by real hardware, such as PEBS_UPDATE_DS_SW. This would cause
> the VMX hardware MSR switching mechanism to save/restore invalid values
> for PEBS_DATA_CFG MSR, thus crashing the host when PEBS is used for guest.
> Fix it by using the active host value from cpuc->active_pebs_data_cfg.
In the future, please Cc: kvm@xxxxxxxxxxxxxxx when posting fixes that obviously
affect KVM. I wasted several hours bisecting these crashes. In hindsight, I
should have searched all of lore sooner, but it really shouldn't have been that
hard for me to find this fix.
> Cc: Kan Liang <kan.liang@xxxxxxxxxxxxxxx>
> Cc: Peter Zijlstra <peterz@xxxxxxxxxxxxx>
> Signed-off-by: Like Xu <likexu@xxxxxxxxxxx>
> ---
> arch/x86/events/intel/core.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
> index 070cc4ef2672..89b9c1cebb61 100644
> --- a/arch/x86/events/intel/core.c
> +++ b/arch/x86/events/intel/core.c
> @@ -4074,7 +4074,7 @@ static struct perf_guest_switch_msr *intel_guest_get_msrs(int *nr, void *data)
> if (x86_pmu.intel_cap.pebs_baseline) {
> arr[(*nr)++] = (struct perf_guest_switch_msr){
> .msr = MSR_PEBS_DATA_CFG,
> - .host = cpuc->pebs_data_cfg,
> + .host = cpuc->active_pebs_data_cfg,
> .guest = kvm_pmu->pebs_data_cfg,
> };
> }
> --
> 2.40.1
>
