On Mon, Jun 05 2023 at 15:50, Thomas Gleixner wrote: > On Mon, Apr 10 2023 at 01:14, Xin Li wrote: >> Allow single-step trap and NMI when starting a new thread, thus once >> the new thread returns to ring3, single-step trap and NMI are both >> enabled immediately. >> >> High-order 48 bits above the lowest 16 bit CS are discarded by the >> legacy IRET instruction, thus can be set unconditionally, even when >> FRED is not enabled. > > I assume this has been validated to be true on _all_ CPU incarnations of > _all_ x86 vendors. It's also ensured that VMMs do not get confused by this, right? > If so, then please document it. If not, then go back to the drawing > board. > > Thanks, > > tglx
