Hi Reiji, On Fri, May 19, 2023 at 4:52 PM Reiji Watanabe <reijiw@xxxxxxxxxx> wrote: > > Hi Jing, > > On Wed, May 17, 2023 at 06:10:11AM +0000, Jing Zhang wrote: > > With per guest ID registers, ID_AA64PFR0_EL1.[CSV2|CSV3] settings from > > userspace can be stored in its corresponding ID register. > > > > The setting of CSV bits for protected VMs are removed according to the > > discussion from Fuad below: > > https://lore.kernel.org/all/CA+EHjTwXA9TprX4jeG+-D+c8v9XG+oFdU1o6TSkvVye145_OvA@xxxxxxxxxxxxxx > > > > Besides the removal of CSV bits setting for protected VMs, No other > > functional change intended. > > > > Signed-off-by: Jing Zhang <jingzhangos@xxxxxxxxxx> > > --- > > arch/arm64/include/asm/kvm_host.h | 2 -- > > arch/arm64/kvm/arm.c | 17 ---------- > > arch/arm64/kvm/sys_regs.c | 55 +++++++++++++++++++++++++------ > > 3 files changed, 45 insertions(+), 29 deletions(-) > > > > diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h > > index 949a4a782844..07f0e091ae48 100644 > > --- a/arch/arm64/include/asm/kvm_host.h > > +++ b/arch/arm64/include/asm/kvm_host.h > > @@ -257,8 +257,6 @@ struct kvm_arch { > > > > cpumask_var_t supported_cpus; > > > > - u8 pfr0_csv2; > > - u8 pfr0_csv3; > > struct { > > u8 imp:4; > > u8 unimp:4; > > diff --git a/arch/arm64/kvm/arm.c b/arch/arm64/kvm/arm.c > > index 774656a0718d..5114521ace60 100644 > > --- a/arch/arm64/kvm/arm.c > > +++ b/arch/arm64/kvm/arm.c > > @@ -102,22 +102,6 @@ static int kvm_arm_default_max_vcpus(void) > > return vgic_present ? kvm_vgic_get_max_vcpus() : KVM_MAX_VCPUS; > > } > > > > -static void set_default_spectre(struct kvm *kvm) > > -{ > > - /* > > - * The default is to expose CSV2 == 1 if the HW isn't affected. > > - * Although this is a per-CPU feature, we make it global because > > - * asymmetric systems are just a nuisance. > > - * > > - * Userspace can override this as long as it doesn't promise > > - * the impossible. > > - */ > > - if (arm64_get_spectre_v2_state() == SPECTRE_UNAFFECTED) > > - kvm->arch.pfr0_csv2 = 1; > > - if (arm64_get_meltdown_state() == SPECTRE_UNAFFECTED) > > - kvm->arch.pfr0_csv3 = 1; > > -} > > - > > /** > > * kvm_arch_init_vm - initializes a VM data structure > > * @kvm: pointer to the KVM struct > > @@ -161,7 +145,6 @@ int kvm_arch_init_vm(struct kvm *kvm, unsigned long type) > > /* The maximum number of VCPUs is limited by the host's GIC model */ > > kvm->max_vcpus = kvm_arm_default_max_vcpus(); > > > > - set_default_spectre(kvm); > > kvm_arm_init_hypercalls(kvm); > > kvm_arm_init_id_regs(kvm); > > > > diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c > > index d2ee3a1c7f03..3c52b136ade3 100644 > > --- a/arch/arm64/kvm/sys_regs.c > > +++ b/arch/arm64/kvm/sys_regs.c > > @@ -1218,10 +1218,6 @@ static u64 kvm_arm_read_id_reg(const struct kvm_vcpu *vcpu, u32 id) > > if (!vcpu_has_sve(vcpu)) > > val &= ~ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_SVE); > > val &= ~ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_AMU); > > - val &= ~ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_CSV2); > > - val |= FIELD_PREP(ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_CSV2), (u64)vcpu->kvm->arch.pfr0_csv2); > > - val &= ~ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_CSV3); > > - val |= FIELD_PREP(ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_CSV3), (u64)vcpu->kvm->arch.pfr0_csv3); > > if (kvm_vgic_global_state.type == VGIC_V3) { > > val &= ~ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_GIC); > > val |= FIELD_PREP(ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_GIC), 1); > > @@ -1359,7 +1355,10 @@ static int set_id_aa64pfr0_el1(struct kvm_vcpu *vcpu, > > const struct sys_reg_desc *rd, > > u64 val) > > { > > + struct kvm_arch *arch = &vcpu->kvm->arch; > > + u64 sval = val; > > u8 csv2, csv3; > > + int ret = 0; > > > > /* > > * Allow AA64PFR0_EL1.CSV2 to be set from userspace as long as > > @@ -1377,17 +1376,26 @@ static int set_id_aa64pfr0_el1(struct kvm_vcpu *vcpu, > > (csv3 && arm64_get_meltdown_state() != SPECTRE_UNAFFECTED)) > > return -EINVAL; > > > > + mutex_lock(&arch->config_lock); > > /* We can only differ with CSV[23], and anything else is an error */ > > val ^= read_id_reg(vcpu, rd); > > val &= ~(ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_CSV2) | > > ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_CSV3)); > > - if (val) > > - return -EINVAL; > > - > > - vcpu->kvm->arch.pfr0_csv2 = csv2; > > - vcpu->kvm->arch.pfr0_csv3 = csv3; > > + if (val) { > > + ret = -EINVAL; > > + goto out; > > + } > > > > - return 0; > > + /* Only allow userspace to change the idregs before VM running */ > > + if (test_bit(KVM_ARCH_FLAG_HAS_RAN_ONCE, &vcpu->kvm->arch.flags)) { > > How about using kvm_vm_has_ran_once() instead ? Sure. > > > > + if (sval != read_id_reg(vcpu, rd)) > > Rather than calling read_id_reg() twice in this function, > perhaps you might want to save the original val we got earlier > and re-use it here ? Will do. > > Thank you, > Reiji > > > > > > + ret = -EBUSY; > > + } else { > > + IDREG(vcpu->kvm, reg_to_encoding(rd)) = sval; > > + } > > +out: > > + mutex_unlock(&arch->config_lock); > > + return ret; > > } > > > > static int set_id_aa64dfr0_el1(struct kvm_vcpu *vcpu, > > @@ -1479,7 +1487,12 @@ static int set_id_dfr0_el1(struct kvm_vcpu *vcpu, > > static int get_id_reg(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd, > > u64 *val) > > { > > + struct kvm_arch *arch = &vcpu->kvm->arch; > > + > > + mutex_lock(&arch->config_lock); > > *val = read_id_reg(vcpu, rd); > > + mutex_unlock(&arch->config_lock); > > + > > return 0; > > } > > > > @@ -3364,6 +3377,7 @@ void kvm_arm_init_id_regs(struct kvm *kvm) > > { > > const struct sys_reg_desc *idreg; > > struct sys_reg_params params; > > + u64 val; > > u32 id; > > > > /* Find the first idreg (SYS_ID_PFR0_EL1) in sys_reg_descs. */ > > @@ -3386,6 +3400,27 @@ void kvm_arm_init_id_regs(struct kvm *kvm) > > idreg++; > > id = reg_to_encoding(idreg); > > } > > + > > + /* > > + * The default is to expose CSV2 == 1 if the HW isn't affected. > > + * Although this is a per-CPU feature, we make it global because > > + * asymmetric systems are just a nuisance. > > + * > > + * Userspace can override this as long as it doesn't promise > > + * the impossible. > > + */ > > + val = IDREG(kvm, SYS_ID_AA64PFR0_EL1); > > + > > + if (arm64_get_spectre_v2_state() == SPECTRE_UNAFFECTED) { > > + val &= ~ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_CSV2); > > + val |= FIELD_PREP(ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_CSV2), 1); > > + } > > + if (arm64_get_meltdown_state() == SPECTRE_UNAFFECTED) { > > + val &= ~ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_CSV3); > > + val |= FIELD_PREP(ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_CSV3), 1); > > + } > > + > > + IDREG(kvm, SYS_ID_AA64PFR0_EL1) = val; > > } > > > > int __init kvm_sys_reg_table_init(void) > > -- > > 2.40.1.606.ga4b1b128d6-goog > > Thanks, Jing
