RE: [PATCH v8 0/6] Support writable CPU ID registers from userspace

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> -----Original Message-----
> From: Marc Zyngier [mailto:maz@xxxxxxxxxx]
> Sent: 16 May 2023 12:01
> To: Shameerali Kolothum Thodi <shameerali.kolothum.thodi@xxxxxxxxxx>
> Cc: Jing Zhang <jingzhangos@xxxxxxxxxx>; KVM <kvm@xxxxxxxxxxxxxxx>;
> KVMARM <kvmarm@xxxxxxxxxxxxxxx>; ARMLinux
> <linux-arm-kernel@xxxxxxxxxxxxxxxxxxx>; Oliver Upton <oupton@xxxxxxxxxx>;
> Will Deacon <will@xxxxxxxxxx>; Paolo Bonzini <pbonzini@xxxxxxxxxx>;
> James Morse <james.morse@xxxxxxx>; Alexandru Elisei
> <alexandru.elisei@xxxxxxx>; Suzuki K Poulose <suzuki.poulose@xxxxxxx>;
> Fuad Tabba <tabba@xxxxxxxxxx>; Reiji Watanabe <reijiw@xxxxxxxxxx>;
> Raghavendra Rao Ananta <rananta@xxxxxxxxxx>
> Subject: Re: [PATCH v8 0/6] Support writable CPU ID registers from
> userspace
> 
> On Tue, 16 May 2023 11:37:20 +0100,
> Shameerali Kolothum Thodi <shameerali.kolothum.thodi@xxxxxxxxxx>
> wrote:
> >
> > > -----Original Message-----
> > > From: Jing Zhang [mailto:jingzhangos@xxxxxxxxxx]
> > > Sent: 03 May 2023 18:16
> > > To: KVM <kvm@xxxxxxxxxxxxxxx>; KVMARM <kvmarm@xxxxxxxxxxxxxxx>;
> > > ARMLinux <linux-arm-kernel@xxxxxxxxxxxxxxxxxxx>; Marc Zyngier
> > > <maz@xxxxxxxxxx>; Oliver Upton <oupton@xxxxxxxxxx>
> > > Cc: Will Deacon <will@xxxxxxxxxx>; Paolo Bonzini
> <pbonzini@xxxxxxxxxx>;
> > > James Morse <james.morse@xxxxxxx>; Alexandru Elisei
> > > <alexandru.elisei@xxxxxxx>; Suzuki K Poulose
> <suzuki.poulose@xxxxxxx>;
> > > Fuad Tabba <tabba@xxxxxxxxxx>; Reiji Watanabe <reijiw@xxxxxxxxxx>;
> > > Raghavendra Rao Ananta <rananta@xxxxxxxxxx>; Jing Zhang
> > > <jingzhangos@xxxxxxxxxx>
> > > Subject: [PATCH v8 0/6] Support writable CPU ID registers from
> userspace
> > >
> > > This patchset refactors/adds code to support writable per guest CPU ID
> > > feature
> > > registers. Part of the code/ideas are from
> > >
> https://lore.kernel.org/all/20220419065544.3616948-1-reijiw@xxxxxxxxxx
> >
> > Hi Jing/Reiji,
> >
> > Just to check the status on the above mentioned series "KVM: arm64: Make
> CPU
> > ID registers writable by userspace". Is there any plan to respin that one
> soon?
> > (Sorry, not sure there is any other series in progress for that support
> currently)
> 
> I think this still is the latest, which I'm about to review again. I'd
> appreciate if you could have a look to!

Thanks Marc for confirming. Will go through. We do have some requirement to
add support for Qemu CPU models/migration between different hosts.

Thanks,
Shameer
 
> 
> Thanks,
> 
> 	M.
> 
> --
> Without deviation from the norm, progress is not possible.



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