On 5/16/2023 11:01 AM, Chao Gao wrote:
On Tue, May 16, 2023 at 10:22:22AM +0800, Xiaoyao Li wrote:
I think we need to fix this bug at first.
I have no idea how to fix the "bug" without intercepting the MSR. The
performance penalty makes me think intercepting the MSR is not a viable
solution.
I thought correctness always takes higher priority over performance.
It is generally true. however, there are situations where we should make
trade-offs between correctness and other factors (like performance):
E.g., instructions without control bits, to be 100% compliant with CPU
spec, in theory, VMMs can trap/decode every instruction and inject #UD
if a guest tries to use some instructions it shouldn't.
This is the virtualization hole. IMHO, they are different things.
Pass through MSR_IA32_SPEC_CTRL was introduced in commit d28b387fb74d
("KVM/VMX: Allow direct access to MSR_IA32_SPEC_CTRL"). At that time
there was only a few bits defined, and the changelog called out that
No attempt is made to handle STIBP here, intentionally. Filtering
STIBP may be added in a future patch, which may require trapping all
writes if we don't want to pass it through directly to the guest.
Per my undesrstanding, it implied that we need to re-visit it when more
bits added instead of following the pass-through design siliently.
