> > > > > LAM only applies to 64-bit linear address, which means LAM can only be enabled > > when CPU is in 64-bit mode with either 4-level or 5-level paging enabled. > > > > What's the hardware behaviour if we set CR4.LAM_SUP when CPU isn't in 64-bit > > mode? And how does VMENTRY check GUEST_CR4.LAM_SUP and 64-bit mode? > > > > Looks they are not clear in the spec you pasted in the cover letter: > > > > https://cdrdv2.intel.com/v1/dl/getContent/671368 > > > > Or I am missing something? > Yes, it is not clearly described in LAM spec. > Had some internal discussions and also did some tests in host, > if the processor supports LAM, CR4.LAM_SUP is allowed to be set even > when cpu isn't in 64bit mode. > > There was a statement in commit message of the last version, but I > missed it in this version. I'll add it back. > "CR4.LAM_SUP is allowed to be set even not in 64-bit mode, but it will not > take effect since LAM only applies to 64-bit linear address." Yeah this does help. Please add it back to the changelog. > > Also, I will try to ask Intel guys if it's possible to update the document. > Thanks.
