Supplement vcpu env initial when vcpu reset, including init vcpu mp_state value to KVM_MP_STATE_RUNNABLE and init vcpu CSR_CPUID,CSR_TID to cpu->cpu_index. Signed-off-by: Tianrui Zhao <zhaotianrui@xxxxxxxxxxx> --- target/loongarch/cpu.c | 3 +++ target/loongarch/cpu.h | 2 ++ 2 files changed, 5 insertions(+) diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c index 97e6579f6a..600c00bbf2 100644 --- a/target/loongarch/cpu.c +++ b/target/loongarch/cpu.c @@ -486,10 +486,12 @@ static void loongarch_cpu_reset_hold(Object *obj) env->CSR_ESTAT = env->CSR_ESTAT & (~MAKE_64BIT_MASK(0, 2)); env->CSR_RVACFG = FIELD_DP64(env->CSR_RVACFG, CSR_RVACFG, RBITS, 0); + env->CSR_CPUID = cs->cpu_index; env->CSR_TCFG = FIELD_DP64(env->CSR_TCFG, CSR_TCFG, EN, 0); env->CSR_LLBCTL = FIELD_DP64(env->CSR_LLBCTL, CSR_LLBCTL, KLO, 0); env->CSR_TLBRERA = FIELD_DP64(env->CSR_TLBRERA, CSR_TLBRERA, ISTLBR, 0); env->CSR_MERRCTL = FIELD_DP64(env->CSR_MERRCTL, CSR_MERRCTL, ISMERR, 0); + env->CSR_TID = cs->cpu_index; env->CSR_PRCFG3 = FIELD_DP64(env->CSR_PRCFG3, CSR_PRCFG3, TLB_TYPE, 2); env->CSR_PRCFG3 = FIELD_DP64(env->CSR_PRCFG3, CSR_PRCFG3, MTLB_ENTRY, 63); @@ -510,6 +512,7 @@ static void loongarch_cpu_reset_hold(Object *obj) restore_fp_status(env); cs->exception_index = -1; + env->mp_state = KVM_MP_STATE_RUNNABLE; } static void loongarch_cpu_disas_set_info(CPUState *s, disassemble_info *info) diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h index e11c875188..86b9f26d60 100644 --- a/target/loongarch/cpu.h +++ b/target/loongarch/cpu.h @@ -288,6 +288,7 @@ typedef struct CPUArchState { uint64_t CSR_PWCH; uint64_t CSR_STLBPS; uint64_t CSR_RVACFG; + uint64_t CSR_CPUID; uint64_t CSR_PRCFG1; uint64_t CSR_PRCFG2; uint64_t CSR_PRCFG3; @@ -328,6 +329,7 @@ typedef struct CPUArchState { MemoryRegion iocsr_mem; bool load_elf; uint64_t elf_address; + uint32_t mp_state; #endif } CPULoongArchState; -- 2.31.1