On Thu, Mar 30, 2023, Mathias Krause wrote: > On 30.03.23 22:15, Mathias Krause wrote: > > [...] > > Maybe it's not a stale CR0 value but the page table walker not taking > > the guest's CR0.WP into account? Maybe a missing role update? > > Indeed, it is. This does the trick for me: > > diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c > index 31be188aa842..6a9e90725c84 100644 > --- a/arch/x86/kvm/x86.c > +++ b/arch/x86/kvm/x86.c > @@ -8372,6 +8372,9 @@ static void init_emulate_ctxt(struct kvm_vcpu *vcpu) > > init_decode_cache(ctxt); > vcpu->arch.emulate_regs_need_sync_from_vcpu = false; > + /* Ensure we're doing page table walks with an up2date MMU role */ > + if ((vcpu->arch.cr0 ^ kvm_read_cr0(vcpu)) == X86_CR0_WP) > + kvm_init_mmu(vcpu); > } > > void kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip) > > Very heavy weight and misplaced, but a start :) > > It should (1) be limited to VMX as that's the only one that would make > CR0.WP a guest owned bit and (2) limited to emulated instructions that > actually do write operations, as read are harmless, obviously. For the record, I wrote my email before I saw this ;-)
