On Wed, Mar 22, 2023 at 10:31 AM Like Xu <like.xu.linux@xxxxxxxxx> wrote: > > From: Like Xu <likexu@xxxxxxxxxxx> > > Per Intel SDM, the bit width of a PMU counter is specified via CPUID > only if the vCPU has FW_WRITE[bit 13] on IA32_PERF_CAPABILITIES. > When the FW_WRITE bit is not set, only EAX is valid and out-of-bounds > bits accesses do not generate #GP. Conversely when this bit is set, #GP > for out-of-bounds bits accesses will also appear on the fixed counters. > vPMU currently does not support emulation of bit widths lower than 32 > bits or higher than its host capability. Can you please point out the date and paragraph of the SDM? Paolo
