On Fri, Mar 17, 2023 at 11:35:26AM +0000, Andy Chiu wrote: > From: Greentime Hu <greentime.hu@xxxxxxxxxx> > > This patch is used to detect the size of CPU vector registers and use > riscv_v_vsize to save the size of all the vector registers. It assumes all > harts has the same capabilities in a SMP system. > > Co-developed-by: Guo Ren <guoren@xxxxxxxxxxxxxxxxx> > Signed-off-by: Guo Ren <guoren@xxxxxxxxxxxxxxxxx> > Co-developed-by: Vincent Chen <vincent.chen@xxxxxxxxxx> > Signed-off-by: Vincent Chen <vincent.chen@xxxxxxxxxx> > Signed-off-by: Greentime Hu <greentime.hu@xxxxxxxxxx> > Signed-off-by: Andy Chiu <andy.chiu@xxxxxxxxxx> > Reviewed-by: Conor Dooley <conor.dooley@xxxxxxxxxxxxx> FYI git am complains while applying this patch about whitespace issues: Applying: riscv: Introduce riscv_v_vsize to record size of Vector context Using index info to reconstruct a base tree... M arch/riscv/kernel/cpufeature.c .git/rebase-apply/patch:90: new blank line at EOF. + warning: 1 line adds whitespace errors. Falling back to patching base and 3-way merge... Thanks, Conor.
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