On Fri, Mar 17, 2023 at 5:08 PM Andy Chiu <andy.chiu@xxxxxxxxxx> wrote:
>
> From: Vincent Chen <vincent.chen@xxxxxxxxxx>
>
> Add V extension to KVM isa extension list to enable supporting of V
> extension on VCPUs.
>
> Signed-off-by: Vincent Chen <vincent.chen@xxxxxxxxxx>
> Signed-off-by: Greentime Hu <greentime.hu@xxxxxxxxxx>
> Signed-off-by: Andy Chiu <andy.chiu@xxxxxxxxxx>
> Reviewed-by: Conor Dooley <conor.dooley@xxxxxxxxxxxxx>
Looks good to me.
Reviewed-by: Anup Patel <anup@xxxxxxxxxxxxxx>
Acked-by: Anup Patel <anup@xxxxxxxxxxxxxx>
Regards,
Anup
> ---
> arch/riscv/include/uapi/asm/kvm.h | 1 +
> arch/riscv/kvm/vcpu.c | 1 +
> 2 files changed, 2 insertions(+)
>
> diff --git a/arch/riscv/include/uapi/asm/kvm.h b/arch/riscv/include/uapi/asm/kvm.h
> index 92af6f3f057c..3e3de7d486e1 100644
> --- a/arch/riscv/include/uapi/asm/kvm.h
> +++ b/arch/riscv/include/uapi/asm/kvm.h
> @@ -105,6 +105,7 @@ enum KVM_RISCV_ISA_EXT_ID {
> KVM_RISCV_ISA_EXT_SVINVAL,
> KVM_RISCV_ISA_EXT_ZIHINTPAUSE,
> KVM_RISCV_ISA_EXT_ZICBOM,
> + KVM_RISCV_ISA_EXT_V,
> KVM_RISCV_ISA_EXT_MAX,
> };
>
> diff --git a/arch/riscv/kvm/vcpu.c b/arch/riscv/kvm/vcpu.c
> index 7d010b0be54e..a7ddb7cf813e 100644
> --- a/arch/riscv/kvm/vcpu.c
> +++ b/arch/riscv/kvm/vcpu.c
> @@ -57,6 +57,7 @@ static const unsigned long kvm_isa_ext_arr[] = {
> [KVM_RISCV_ISA_EXT_H] = RISCV_ISA_EXT_h,
> [KVM_RISCV_ISA_EXT_I] = RISCV_ISA_EXT_i,
> [KVM_RISCV_ISA_EXT_M] = RISCV_ISA_EXT_m,
> + [KVM_RISCV_ISA_EXT_V] = RISCV_ISA_EXT_v,
>
> KVM_ISA_EXT_ARR(SSTC),
> KVM_ISA_EXT_ARR(SVINVAL),
> --
> 2.17.1
>
