From: Like Xu <likexu@xxxxxxxxxxx> >From the guest's point of view, vPMU's global_status bit update following a counter overflow is completely independent of whether it is emulated in the host PMI context. The guest counter overflow emulation only depends on whether pmc->counter has an overflow or not. Plus the counter overflow generated by the emulation instruction has been delayed and not been handled in the PMI context. This part of the logic can be unified by reusing pmc->prev_counter for a normal counter. However for a PEBS counter, its buffer overflow irq still requires hardware to trigger PMI. Signed-off-by: Like Xu <likexu@xxxxxxxxxxx> --- arch/x86/kvm/pmu.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/arch/x86/kvm/pmu.c b/arch/x86/kvm/pmu.c index 01a6b7ffa9b1..81c7cc4ceadf 100644 --- a/arch/x86/kvm/pmu.c +++ b/arch/x86/kvm/pmu.c @@ -160,7 +160,10 @@ static void kvm_perf_overflow(struct perf_event *perf_event, if (test_and_set_bit(pmc->idx, pmc_to_pmu(pmc)->reprogram_pmi)) return; - __kvm_perf_overflow(pmc, true); + if (pebs_is_enabled(pmc)) + __kvm_perf_overflow(pmc, true); + else + pmc->prev_counter = pmc->counter; kvm_make_request(KVM_REQ_PMU, pmc->vcpu); } -- 2.39.2
