On 3/2/23 04:02, Shaoqin Huang wrote:
> Use gic_enable/disable_irq() to clean up the code.
>
> Signed-off-by: Shaoqin Huang <shahuang@xxxxxxxxxx>
Reviewed-by: Eric Auger <eric.auger@xxxxxxxxxx>
Thanks
Eric
> ---
> arm/timer.c | 20 +++-----------------
> 1 file changed, 3 insertions(+), 17 deletions(-)
>
> diff --git a/arm/timer.c b/arm/timer.c
> index c4e7b10..c0a8388 100644
> --- a/arm/timer.c
> +++ b/arm/timer.c
> @@ -14,9 +14,6 @@
> #include <asm/gic.h>
> #include <asm/io.h>
>
> -static void *gic_isenabler;
> -static void *gic_icenabler;
> -
> static bool ptimer_unsupported;
>
> static void ptimer_unsupported_handler(struct pt_regs *regs, unsigned int esr)
> @@ -139,12 +136,12 @@ static struct timer_info ptimer_info = {
>
> static void set_timer_irq_enabled(struct timer_info *info, bool enabled)
> {
> - u32 val = 1 << PPI(info->irq);
> + u32 irq = PPI(info->irq);
>
> if (enabled)
> - writel(val, gic_isenabler);
> + gic_enable_irq(irq);
> else
> - writel(val, gic_icenabler);
> + gic_disable_irq(irq);
> }
>
> static void irq_handler(struct pt_regs *regs)
> @@ -366,17 +363,6 @@ static void test_init(void)
>
> gic_enable_defaults();
>
> - switch (gic_version()) {
> - case 2:
> - gic_isenabler = gicv2_dist_base() + GICD_ISENABLER;
> - gic_icenabler = gicv2_dist_base() + GICD_ICENABLER;
> - break;
> - case 3:
> - gic_isenabler = gicv3_sgi_base() + GICR_ISENABLER0;
> - gic_icenabler = gicv3_sgi_base() + GICR_ICENABLER0;
> - break;
> - }
> -
> install_irq_handler(EL1H_IRQ, irq_handler);
> set_timer_irq_enabled(&ptimer_info, true);
> set_timer_irq_enabled(&vtimer_info, true);
