On Tue, Feb 28, 2023 at 07:55:09PM +0200,
Zhi Wang <zhi.wang.linux@xxxxxxxxx> wrote:
> On Mon, 27 Feb 2023 15:49:14 -0800
> Isaku Yamahata <isaku.yamahata@xxxxxxxxx> wrote:
> > > 2) Move
> > >
> > > > + apic_base_msr.data = APIC_DEFAULT_PHYS_BASE | LAPIC_MODE_X2APIC;
> > > > + if (kvm_vcpu_is_reset_bsp(vcpu))
> > > > + apic_base_msr.data |= MSR_IA32_APICBASE_BSP;
> > > > + apic_base_msr.host_initiated = true;
> > >
> > > to:
> > >
> > > void kvm_lapic_reset(struct kvm_vcpu *vcpu, bool init_event)
> > > {
> > > struct kvm_lapic *apic = vcpu->arch.apic;
> > > u64 msr_val;
> > > int i;
> > >
> > > if (!init_event) {
> > > msr_val = APIC_DEFAULT_PHYS_BASE | MSR_IA32_APICBASE_ENABLE;
> > >
> > > /* here */
> > > if (is_td_vcpu(vcpu))
> > > msr_val = xxxx;
> > > if (kvm_vcpu_is_reset_bsp(vcpu))
> > > msr_val |= MSR_IA32_APICBASE_BSP;
> > > kvm_lapic_set_base(vcpu, msr_val);
> > > }
> >
> > No. Because I'm trying to contain is_td/is_td_vcpu in vmx specific and not use
> > in common x86 code.
> >
>
> I guess so. Centeralizing the initialization would be the nice and greatly
> improve the readablity of the code. Maybe adding a new callback in kvm x86_ops
> like .get_default_msr_val instead.
Finally I can eliminate cpuid/APIC BASE MSR, and move it user space VMM, qemu.
--
Isaku Yamahata <isaku.yamahata@xxxxxxxxx>
