On 2/14/2023 2:11 PM, Robert Hoo wrote:
On Tue, 2023-02-14 at 09:27 +0800, Binbin Wu wrote:
The interception of CR4 is decided by CR4 guest/host mask and CR4
read
shadow.
My interpretation is that "intercept CR4.x bit" is the opposite of
"guest own CR4.x bit".
Both of them are implemented via CR4 guest/host mask and CR4 shadow,
whose combination decides corresponding CR4.x bit access causes VM exit
or not.
When we changes some bits in CR4_RESERVED_BITS and
__cr4_reserved_bits(), we changes vcpu->arch.cr4_guest_owned_bits which
eventually forms the effective vmcs_writel(CR4_GUEST_HOST_MASK).
According to the code of set_cr4_guest_host_mask,
vcpu->arch.cr4_guest_owned_bits is a subset of KVM_POSSIBLE_CR4_GUEST_BITS,
and X86_CR4_LAM_SUP is not included in KVM_POSSIBLE_CR4_GUEST_BITS.
No matter change CR4_RESERVED_BITS or not, X86_CR4_LAM_SUP will always be set in CR4_GUEST_HOST_MASK.
