Expose IA32_FLUSH_CMD to the guest if the guest CPUID enumerates
support for this MSR. As with IA32_PRED_CMD, permission for
unintercepted writes to this MSR will be granted to the guest after
the first non-zero write.
Signed-off-by: Jim Mattson <jmattson@xxxxxxxxxx>
Signed-off-by: Emanuele Giuseppe Esposito <eesposit@xxxxxxxxxx>
---
arch/x86/kvm/vmx/nested.c | 3 ++
arch/x86/kvm/vmx/vmx.c | 70 +++++++++++++++++++++++++--------------
2 files changed, 48 insertions(+), 25 deletions(-)
diff --git a/arch/x86/kvm/vmx/nested.c b/arch/x86/kvm/vmx/nested.c
index 557b9c468734..075b5ade7c80 100644
--- a/arch/x86/kvm/vmx/nested.c
+++ b/arch/x86/kvm/vmx/nested.c
@@ -654,6 +654,9 @@ static inline bool nested_vmx_prepare_msr_bitmap(struct kvm_vcpu *vcpu,
nested_vmx_set_intercept_for_msr(vmx, msr_bitmap_l1, msr_bitmap_l0,
MSR_IA32_PRED_CMD, MSR_TYPE_W);
+ nested_vmx_set_intercept_for_msr(vmx, msr_bitmap_l1, msr_bitmap_l0,
+ MSR_IA32_FLUSH_CMD, MSR_TYPE_W);
+
kvm_vcpu_unmap(vcpu, &vmx->nested.msr_bitmap_map, false);
vmx->nested.force_msr_bitmap_recalc = false;
diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
index c788aa382611..9a78ea96a6d7 100644
--- a/arch/x86/kvm/vmx/vmx.c
+++ b/arch/x86/kvm/vmx/vmx.c
@@ -2133,6 +2133,39 @@ static u64 vmx_get_supported_debugctl(struct kvm_vcpu *vcpu, bool host_initiated
return debugctl;
}
+static int vmx_set_msr_ia32_cmd(struct kvm_vcpu *vcpu,
+ struct msr_data *msr_info,
+ bool guest_has_feat, u64 cmd,
+ int x86_feature_bit)
+{
+ if (!msr_info->host_initiated && !guest_has_feat)
+ return 1;
+
+ if (!(msr_info->data & ~cmd))
+ return 1;
+ if (!boot_cpu_has(x86_feature_bit))
+ return 1;
+ if (!msr_info->data)
+ return 0;
+
+ wrmsrl(msr_info->index, cmd);
+
+ /*
+ * For non-nested:
+ * When it's written (to non-zero) for the first time, pass
+ * it through.
+ *
+ * For nested:
+ * The handling of the MSR bitmap for L2 guests is done in
+ * nested_vmx_prepare_msr_bitmap. We should not touch the
+ * vmcs02.msr_bitmap here since it gets completely overwritten
+ * in the merging.
+ */
+ vmx_disable_intercept_for_msr(vcpu, msr_info->index, MSR_TYPE_W);
+
+ return 0;
+}
+
/*
* Writes msr value into the appropriate "register".
* Returns 0 on success, non-0 otherwise.
@@ -2288,31 +2321,18 @@ static int vmx_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
return 1;
goto find_uret_msr;
case MSR_IA32_PRED_CMD:
- if (!msr_info->host_initiated &&
- !guest_has_pred_cmd_msr(vcpu))
- return 1;
-
- if (data & ~PRED_CMD_IBPB)
- return 1;
- if (!boot_cpu_has(X86_FEATURE_IBPB))
- return 1;
- if (!data)
- break;
-
- wrmsrl(MSR_IA32_PRED_CMD, PRED_CMD_IBPB);
-
- /*
- * For non-nested:
- * When it's written (to non-zero) for the first time, pass
- * it through.
- *
- * For nested:
- * The handling of the MSR bitmap for L2 guests is done in
- * nested_vmx_prepare_msr_bitmap. We should not touch the
- * vmcs02.msr_bitmap here since it gets completely overwritten
- * in the merging.
- */
- vmx_disable_intercept_for_msr(vcpu, MSR_IA32_PRED_CMD, MSR_TYPE_W);
+ ret = vmx_set_msr_ia32_cmd(vcpu, msr_info,
+ guest_has_pred_cmd_msr(vcpu),
+ PRED_CMD_IBPB,
+ X86_FEATURE_IBPB);
+ break;
+ case MSR_IA32_FLUSH_CMD:
+ bool guest_flush_l1d = guest_cpuid_has(vcpu,
+ X86_FEATURE_FLUSH_L1D);
+ ret = vmx_set_msr_ia32_cmd(vcpu, msr_info,
+ guest_flush_l1d,
+ L1D_FLUSH,
+ X86_FEATURE_FLUSH_L1D);
break;
case MSR_IA32_CR_PAT:
if (!kvm_pat_valid(data))
--
2.39.1
