On Wed, Jan 25, 2023 at 02:20:41PM +0000, Andy Chiu wrote: > clear vector registers on boot if kernel supports V. > > Signed-off-by: Greentime Hu <greentime.hu@xxxxxxxxxx> > Signed-off-by: Vineet Gupta <vineetg@xxxxxxxxxxxx> > [vineetg: broke this out to a seperate patch] > Signed-off-by: Andy Chiu <andy.chiu@xxxxxxxxxx> But this patch didn't carry over the long list of contributors from it's source? Seems a bit odd, that's all. There was also an Rb from Palmer that got dropped too. Was that intentional? https://lore.kernel.org/linux-riscv/20220921214439.1491510-6-stillson@xxxxxxxxxxxx/ Thanks, Conor. > --- > arch/riscv/kernel/head.S | 23 +++++++++++++++++++++++ > 1 file changed, 23 insertions(+) > > diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S > index b865046e4dbb..ea803c96eeff 100644 > --- a/arch/riscv/kernel/head.S > +++ b/arch/riscv/kernel/head.S > @@ -431,6 +431,29 @@ ENTRY(reset_regs) > csrw fcsr, 0 > /* note that the caller must clear SR_FS */ > #endif /* CONFIG_FPU */ > + > +#ifdef CONFIG_RISCV_ISA_V > + csrr t0, CSR_MISA > + li t1, COMPAT_HWCAP_ISA_V > + and t0, t0, t1 > + beqz t0, .Lreset_regs_done > + > + /* > + * Clear vector registers and reset vcsr > + * VLMAX has a defined value, VLEN is a constant, > + * and this form of vsetvli is defined to set vl to VLMAX. > + */ > + li t1, SR_VS > + csrs CSR_STATUS, t1 > + csrs CSR_VCSR, x0 > + vsetvli t1, x0, e8, m8, ta, ma > + vmv.v.i v0, 0 > + vmv.v.i v8, 0 > + vmv.v.i v16, 0 > + vmv.v.i v24, 0 > + /* note that the caller must clear SR_VS */ > +#endif /* CONFIG_RISCV_ISA_V */ > + > .Lreset_regs_done: > ret > END(reset_regs) > -- > 2.17.1 >
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