From: Guo Ren <guoren@xxxxxxxxxxxxxxxxx> This patch adds a config which enables vector feature from the kernel space. Signed-off-by: Guo Ren <guoren@xxxxxxxxxxxxxxxxx> Co-developed-by: Greentime Hu <greentime.hu@xxxxxxxxxx> Signed-off-by: Greentime Hu <greentime.hu@xxxxxxxxxx> Suggested-by: Vineet Gupta <vineetg@xxxxxxxxxxxx> Suggested-by: Atish Patra <atishp@xxxxxxxxxxxxxx> Signed-off-by: Andy Chiu <andy.chiu@xxxxxxxxxx> --- arch/riscv/Kconfig | 10 ++++++++++ arch/riscv/Makefile | 7 +++++++ 2 files changed, 17 insertions(+) diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index e2b656043abf..f4299ba9a843 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -416,6 +416,16 @@ config RISCV_ISA_SVPBMT If you don't know what to do here, say Y. +config RISCV_ISA_V + bool "VECTOR extension support" + depends on GCC_VERSION >= 120000 || CLANG_VERSION >= 130000 + default n + help + Say N here if you want to disable all vector related procedure + in the kernel. + + If you don't know what to do here, say Y. + config TOOLCHAIN_HAS_ZICBOM bool default y diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile index 12d91b0a73d8..67411cdc836f 100644 --- a/arch/riscv/Makefile +++ b/arch/riscv/Makefile @@ -52,6 +52,13 @@ riscv-march-$(CONFIG_ARCH_RV32I) := rv32ima riscv-march-$(CONFIG_ARCH_RV64I) := rv64ima riscv-march-$(CONFIG_FPU) := $(riscv-march-y)fd riscv-march-$(CONFIG_RISCV_ISA_C) := $(riscv-march-y)c +riscv-march-$(CONFIG_RISCV_ISA_V) := $(riscv-march-y)v + +ifeq ($(CONFIG_RISCV_ISA_V), y) +ifeq ($(CONFIG_CC_IS_CLANG), y) + riscv-march-y += -mno-implicit-float -menable-experimental-extensions +endif +endif # Newer binutils versions default to ISA spec version 20191213 which moves some # instructions from the I extension to the Zicsr and Zifencei extensions. -- 2.17.1
