The default serial and rtc IO region overlaps with PCI IO bar region leading bar 0 activation to fail. Moving these devices to MMIO region similar to ARM. Signed-off-by: Rajnesh Kanwal <rkanwal@xxxxxxxxxxxx> --- hw/rtc.c | 3 +++ hw/serial.c | 4 ++++ riscv/include/kvm/kvm-arch.h | 10 ++++++++-- 3 files changed, 15 insertions(+), 2 deletions(-) diff --git a/hw/rtc.c b/hw/rtc.c index 9b8785a..da696e1 100644 --- a/hw/rtc.c +++ b/hw/rtc.c @@ -9,6 +9,9 @@ #if defined(CONFIG_ARM) || defined(CONFIG_ARM64) #define RTC_BUS_TYPE DEVICE_BUS_MMIO #define RTC_BASE_ADDRESS ARM_RTC_MMIO_BASE +#elif defined(CONFIG_RISCV) +#define RTC_BUS_TYPE DEVICE_BUS_MMIO +#define RTC_BASE_ADDRESS RISCV_RTC_MMIO_BASE #else /* PORT 0070-007F - CMOS RAM/RTC (REAL TIME CLOCK) */ #define RTC_BUS_TYPE DEVICE_BUS_IOPORT diff --git a/hw/serial.c b/hw/serial.c index 3d53362..46280d3 100644 --- a/hw/serial.c +++ b/hw/serial.c @@ -17,6 +17,10 @@ #define serial_iobase(nr) (ARM_UART_MMIO_BASE + (nr) * 0x1000) #define serial_irq(nr) (32 + (nr)) #define SERIAL8250_BUS_TYPE DEVICE_BUS_MMIO +#elif defined(CONFIG_RISCV) +#define serial_iobase(nr) (RISCV_UART_MMIO_BASE + (nr) * 0x1000) +#define serial_irq(nr) (1 + nr) +#define SERIAL8250_BUS_TYPE DEVICE_BUS_MMIO #else #define serial_iobase_0 (KVM_IOPORT_AREA + 0x3f8) #define serial_iobase_1 (KVM_IOPORT_AREA + 0x2f8) diff --git a/riscv/include/kvm/kvm-arch.h b/riscv/include/kvm/kvm-arch.h index 3f96d00..620c796 100644 --- a/riscv/include/kvm/kvm-arch.h +++ b/riscv/include/kvm/kvm-arch.h @@ -11,7 +11,7 @@ #define RISCV_IOPORT 0x00000000ULL #define RISCV_IOPORT_SIZE SZ_64K #define RISCV_IRQCHIP 0x08000000ULL -#define RISCV_IRQCHIP_SIZE SZ_128M +#define RISCV_IRQCHIP_SIZE SZ_128M #define RISCV_MMIO 0x10000000ULL #define RISCV_MMIO_SIZE SZ_512M #define RISCV_PCI 0x30000000ULL @@ -35,10 +35,16 @@ #define RISCV_MAX_MEMORY(kvm) RISCV_LOMAP_MAX_MEMORY #endif +#define RISCV_UART_MMIO_BASE RISCV_MMIO +#define RISCV_UART_MMIO_SIZE 0x10000 + +#define RISCV_RTC_MMIO_BASE (RISCV_UART_MMIO_BASE + RISCV_UART_MMIO_SIZE) +#define RISCV_RTC_MMIO_SIZE 0x10000 + #define KVM_IOPORT_AREA RISCV_IOPORT #define KVM_PCI_CFG_AREA RISCV_PCI #define KVM_PCI_MMIO_AREA (KVM_PCI_CFG_AREA + RISCV_PCI_CFG_SIZE) -#define KVM_VIRTIO_MMIO_AREA RISCV_MMIO +#define KVM_VIRTIO_MMIO_AREA (RISCV_RTC_MMIO_BASE + RISCV_UART_MMIO_SIZE) #define KVM_IOEVENTFD_HAS_PIO 0 -- 2.25.1
