On Thu, 12 Jan 2023 15:48:40 +0000, Marc Zyngier wrote:
> When a vcpu is accessing *its own* redistributor's SGIs/PPIs, there
> is no point in doing a stop-the-world operation. Instead, we can
> just let the access occur as we do with GICv2.
>
> This is a very minor optimisation for a non-nesting guest, but
> a potentially major one for a nesting L1 hypervisor which is
> likely to access the emulated registers pretty often (on each
> vcpu switch, at the very least).
>
> [...]
Applied to kvmarm/next, thanks!
[1/1] KVM: arm64: vgic-v3: Limit IPI-ing when accessing GICR_{C,S}ACTIVER0
https://git.kernel.org/kvmarm/kvmarm/c/fd2b165ce2cc
--
Best,
Oliver
