On Fri, Nov 11, 2022, Like Xu wrote: > Starting with Zen4, core PMU on AMD platforms such as Genoa and > Ryzen-7000 will support PerfMonV2, and it is also compatible with > legacy PERFCTR_CORE behavior and msr addresses. > > If you don't have access to the hardware specification, the commits > d6d0c7f681fd..7685665c390d for host perf can also bring a quick > overview. Its main change is the addition of three msr's equivalent > to Intel V2, namely global_ctrl, global_status, global_status_clear. > > It is worth noting that this feature is very attractive for reducing the > overhead of PMU virtualization, since multiple msr accesses to multiple > counters will be replaced by a single access to the global register, > plus more accuracy gain when multiple guest counters are used. Some minor nits, though I haven't looked at the meat of the series yet. I'll give this a thorough review early next week (unless I'm extra ambitious tomorrow).
