On Mon, Dec 19, 2022 at 10:36:49PM -0800, Xin Li wrote:
> From: "H. Peter Anvin (Intel)" <hpa@xxxxxxxxx>
>
> MSR_IA32_FRED_RSP0 is used during ring 3 event delivery, and needs to
> be updated to point to the top of next task stack during task switch.
>
> Signed-off-by: H. Peter Anvin (Intel) <hpa@xxxxxxxxx>
> Signed-off-by: Xin Li <xin3.li@xxxxxxxxx>
> ---
> arch/x86/include/asm/switch_to.h | 8 ++++++--
> 1 file changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/arch/x86/include/asm/switch_to.h b/arch/x86/include/asm/switch_to.h
> index c08eb0fdd11f..c28170d4fbba 100644
> --- a/arch/x86/include/asm/switch_to.h
> +++ b/arch/x86/include/asm/switch_to.h
> @@ -71,9 +71,13 @@ static inline void update_task_stack(struct task_struct *task)
> else
> this_cpu_write(cpu_tss_rw.x86_tss.sp1, task->thread.sp0);
> #else
> - /* Xen PV enters the kernel on the thread stack. */
> - if (static_cpu_has(X86_FEATURE_XENPV))
> + if (cpu_feature_enabled(X86_FEATURE_FRED)) {
> + wrmsrl(MSR_IA32_FRED_RSP0,
> + task_top_of_stack(task) + TOP_OF_KERNEL_STACK_PADDING);
Urgh, I'm assuming this is a *fast* MSR ?
> + } else if (static_cpu_has(X86_FEATURE_XENPV)) {
> + /* Xen PV enters the kernel on the thread stack. */
> load_sp0(task_top_of_stack(task));
> + }
> #endif
