This is to use another AMD SEV-ES hardware assisted register swap, more detail in 2/3. The patches are fairly independend but required in this order. This is based on sha1 0d1409e4ff08 and requires something like this for X86_FEATURE_NO_NESTED_DATA_BP: https://lkml.org/lkml/2022/11/29/1229 This patchset is pushed out at https://github.com/aik/linux/commits/debugswap Please comment. Thanks. btw the enormous cc: list came from get_maintainer.pl, keep it like this or tell the script something to reduce the list? Alexey Kardashevskiy (3): x86/amd: Cache values in percpu variables KVM: SEV: Enable data breakpoints in SEV-ES x86/sev: Do not handle #VC for DR7 read/write arch/x86/include/asm/debugreg.h | 9 +++- arch/x86/include/asm/msr-index.h | 1 + arch/x86/include/asm/svm.h | 1 + arch/x86/kvm/svm/svm.h | 16 +++++-- tools/arch/x86/include/asm/msr-index.h | 1 + arch/x86/kernel/cpu/amd.c | 45 ++++++++++++++------ arch/x86/kernel/sev.c | 6 +++ arch/x86/kvm/svm/sev.c | 29 +++++++++++++ arch/x86/kvm/svm/svm.c | 3 +- 9 files changed, 90 insertions(+), 21 deletions(-) -- 2.38.1
