On Thu, Nov 03, 2022 at 10:50:23AM +0800, Jiaxi Chen wrote:
> diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
> index 1a85e1fb0922..fbb4e7bd2288 100644
> --- a/arch/x86/include/asm/cpufeature.h
> +++ b/arch/x86/include/asm/cpufeature.h
> @@ -24,7 +24,7 @@ enum cpuid_leafs
> CPUID_7_0_EBX,
> CPUID_D_1_EAX,
> CPUID_LNX_4,
> - CPUID_7_1_EAX,
> + CPUID_DUMMY,
> CPUID_8000_0008_EBX,
> CPUID_6_EAX,
> CPUID_8000_000A_EDX,
No, do this (diff ontop):
diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
index fbb4e7bd2288..b2905ddd7ab4 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -24,7 +24,7 @@ enum cpuid_leafs
CPUID_7_0_EBX,
CPUID_D_1_EAX,
CPUID_LNX_4,
- CPUID_DUMMY,
+ CPUID_LNX_5,
CPUID_8000_0008_EBX,
CPUID_6_EAX,
CPUID_8000_000A_EDX,
diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index 91acf8b8e493..5c9023438e57 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -306,6 +306,8 @@
#define X86_FEATURE_RSB_VMEXIT_LITE (11*32+17) /* "" Fill RSB on VM exit when EIBRS is enabled */
#define X86_FEATURE_CALL_DEPTH (11*32+18) /* "" Call depth tracking for RSB stuffing */
+/* Linux-defined mapping, word 12 */
+
/* AMD-defined CPU features, CPUID level 0x80000008 (EBX), word 13 */
#define X86_FEATURE_CLZERO (13*32+ 0) /* CLZERO instruction */
#define X86_FEATURE_IRPERF (13*32+ 1) /* Instructions Retired Count */
---
I'm pretty sure we'll need new bits soon so let's reuse that one for
Linux-defined flags.
Then you can drop patch 2.
Thx.
--
Regards/Gruss,
Boris.
https://people.kernel.org/tglx/notes-about-netiquette
