This series is a big pile of PMU cleanups and enhancements from Like.
The changes are roughly divided into three parts: (1) fixes (2) cleanups,
and (3) new test cases. The changes are bundled in a mega-series as the
original, separate series was difficult to review/manage due to a number
of dependencies.
There are no major changes in the test logic. The big cleanups are to add
lib/x86/pmu.[c,h] and a global PMU capabilities struct to improve
readability of the code and to hide some AMD vs. Intel details.
Like's v4 was tested on AMD Zen3/4 and Intel ICX/SPR machines, but this
version has only been tested on AMD Zen3 (Milan) and Intel ICX and HSW,
i.e. I haven't tested AMD PMU v2 or anything new in SPR (if there is
anything in SPR?).
Like Xu (22):
x86/pmu: Add PDCM check before accessing PERF_CAP register
x86/pmu: Test emulation instructions on full-width counters
x86/pmu: Pop up FW prefix to avoid out-of-context propagation
x86/pmu: Report SKIP when testing Intel LBR on AMD platforms
x86/pmu: Fix printed messages for emulated instruction test
x86/pmu: Introduce __start_event() to drop all of the manual zeroing
x86/pmu: Introduce multiple_{one, many}() to improve readability
x86/pmu: Reset the expected count of the fixed counter 0 when i386
x86: create pmu group for quick pmu-scope testing
x86/pmu: Refine info to clarify the current support
x86/pmu: Update rdpmc testcase to cover #GP path
x86/pmu: Rename PC_VECTOR to PMI_VECTOR for better readability
x86/pmu: Add lib/x86/pmu.[c.h] and move common code to header files
x86/pmu: Snapshot PMU perf_capabilities during BSP initialization
x86/pmu: Track GP counter and event select base MSRs in pmu_caps
x86/pmu: Add helper to get fixed counter MSR index
x86/pmu: Track global status/control/clear MSRs in pmu_caps
x86: Add tests for Guest Processor Event Based Sampling (PEBS)
x86/pmu: Add global helpers to cover Intel Arch PMU Version 1
x86/pmu: Add gp_events pointer to route different event tables
x86/pmu: Update testcases to cover AMD PMU
x86/pmu: Add AMD Guest PerfMonV2 testcases
Sean Christopherson (5):
x86: Add a helper for the BSP's final init sequence common to all
flavors
x86/pmu: Snapshot CPUID.0xA PMU capabilities during BSP initialization
x86/pmu: Drop wrappers that just passthrough pmu_caps fields
x86/pmu: Reset GP and Fixed counters during pmu_init().
x86/pmu: Add pmu_caps flag to track if CPU is Intel (versus AMD)
lib/x86/asm/setup.h | 1 +
lib/x86/msr.h | 30 +++
lib/x86/pmu.c | 67 +++++++
lib/x86/pmu.h | 187 +++++++++++++++++++
lib/x86/processor.h | 80 ++------
lib/x86/setup.c | 13 +-
x86/Makefile.common | 1 +
x86/Makefile.x86_64 | 1 +
x86/cstart.S | 4 +-
x86/cstart64.S | 4 +-
x86/pmu.c | 360 ++++++++++++++++++++----------------
x86/pmu_lbr.c | 24 +--
x86/pmu_pebs.c | 433 ++++++++++++++++++++++++++++++++++++++++++++
x86/unittests.cfg | 10 +
x86/vmx_tests.c | 1 +
15 files changed, 975 insertions(+), 241 deletions(-)
create mode 100644 lib/x86/pmu.c
create mode 100644 lib/x86/pmu.h
create mode 100644 x86/pmu_pebs.c
base-commit: 73d9d850f1c2c9f0df321967e67acda0d2c305ea
--
2.38.1.431.g37b22c650d-goog
