On 10/25/22 14:47, Maxim Levitsky wrote:
+ u32 cr4; /* CR4 is not present in Intel/AMD SMRAM image */ + u32 reserved3[5]; + + /* + * Segment state is not present/documented in the Intel/AMD SMRAM image + * Instead this area on Intel/AMD contains IO/HLT restart flags. + */
Both of these are based on the Intel P6 layout at https://www.sandpile.org/x86/smm.htm.
Paolo
