On Thu, 20 Oct 2022 09:00:03 +0000 Janosch Frank <frankja@xxxxxxxxxxxxx> wrote: > Setting exception new PSWs is commonly needed so let's add a macro for > that. > > Signed-off-by: Janosch Frank <frankja@xxxxxxxxxxxxx> > Reviewed-by: Nico Boehr <nrb@xxxxxxxxxxxxx> Reviewed-by: Claudio Imbrenda <imbrenda@xxxxxxxxxxxxx> > --- > s390x/snippets/asm/macros.S | 28 ++++++++++++++++++++++++ > s390x/snippets/asm/snippet-pv-diag-288.S | 4 ++-- > s390x/snippets/asm/snippet-pv-diag-500.S | 6 ++--- > 3 files changed, 32 insertions(+), 6 deletions(-) > create mode 100644 s390x/snippets/asm/macros.S > > diff --git a/s390x/snippets/asm/macros.S b/s390x/snippets/asm/macros.S > new file mode 100644 > index 00000000..667fb6dc > --- /dev/null > +++ b/s390x/snippets/asm/macros.S > @@ -0,0 +1,28 @@ > +/* SPDX-License-Identifier: GPL-2.0-only */ > +/* > + * Commonly used assembly macros > + * > + * Copyright (c) 2022 IBM Corp > + * > + * Authors: > + * Janosch Frank <frankja@xxxxxxxxxxxxx> > + */ > +#include <asm/asm-offsets.h> > + > +/* > + * Writes a PSW to addr_psw, useful for exception PSWs in lowcore > + * > + * reg is the scratch register used for temporary storage, it's NOT restored > + * The psw address part is defined via psw_new_addr > + * The psw mask part is always 64 bit > + */ > +.macro SET_PSW_NEW_ADDR reg, psw_new_addr, addr_psw > +larl \reg, psw_mask_64 > +stg \reg, \addr_psw > +larl \reg, \psw_new_addr > +stg \reg, \addr_psw + 8 > +.endm > + > +.section .rodata > +psw_mask_64: > + .quad 0x0000000180000000 > diff --git a/s390x/snippets/asm/snippet-pv-diag-288.S b/s390x/snippets/asm/snippet-pv-diag-288.S > index aaee3cd1..63f2113b 100644 > --- a/s390x/snippets/asm/snippet-pv-diag-288.S > +++ b/s390x/snippets/asm/snippet-pv-diag-288.S > @@ -8,6 +8,7 @@ > * Janosch Frank <frankja@xxxxxxxxxxxxx> > */ > #include <asm/asm-offsets.h> > +#include "macros.S" > .section .text > > /* Clean and pre-load registers that are used for diag 288 */ > @@ -19,8 +20,7 @@ lghi %r1, 2 > lghi %r2, 3 > > /* Let's jump to the pgm exit label on a PGM */ > -larl %r4, exit_pgm > -stg %r4, GEN_LC_PGM_NEW_PSW + 8 > +SET_PSW_NEW_ADDR 4, exit_pgm, GEN_LC_PGM_NEW_PSW > > /* Execute the diag288 */ > diag %r0, %r2, 0x288 > diff --git a/s390x/snippets/asm/snippet-pv-diag-500.S b/s390x/snippets/asm/snippet-pv-diag-500.S > index 8dd66bd9..f4d75388 100644 > --- a/s390x/snippets/asm/snippet-pv-diag-500.S > +++ b/s390x/snippets/asm/snippet-pv-diag-500.S > @@ -8,6 +8,7 @@ > * Janosch Frank <frankja@xxxxxxxxxxxxx> > */ > #include <asm/asm-offsets.h> > +#include "macros.S" > .section .text > > /* Clean and pre-load registers that are used for diag 500 */ > @@ -21,10 +22,7 @@ lghi %r3, 3 > lghi %r4, 4 > > /* Let's jump to the next label on a PGM */ > -xgr %r5, %r5 > -stg %r5, GEN_LC_PGM_NEW_PSW > -larl %r5, next > -stg %r5, GEN_LC_PGM_NEW_PSW + 8 > +SET_PSW_NEW_ADDR 5, next, GEN_LC_PGM_NEW_PSW > > /* Execute the diag500 */ > diag 0, 0, 0x500
