Jan Kiszka wrote: > Avi Kivity wrote: >> On 02/14/2010 02:43 PM, Gleb Natapov wrote: >>>> Nice. >>>> >>>> [ /me goes updating his manual - September 07... ] >>>> >>>> >>> I can't find nothing newer then that. What is the link? >>> >> http://www.amd.com/us-en/Processors/DevelopWithAMD/0,,30_2252_875_7044,00.html >> > > For the records, it's > > http://developer.amd.com/documentation/guides/Pages/default.aspx > > and then > > http://support.amd.com/us/Processor_TechDocs/24593.pdf > > (Your link still points to the previous revision.) > > nRIP is actually useless for our problem. Either SVM has built-in magic > to push the RIP after the INT3 on the stack or we need a workaround. I > bet on the latter as our use case may not have been exercised that often > before (if at all). > On the other hand: "Injecting an exception (TYPE = 3) with vectors 3 or 4 behaves like a trap raised by INT3 and INTO instructions, respectively, in which case the processor checks the DPL of the IDT descriptor before dispatching to the handler." Which /might/ also be read that not only the privilege checks are applied, but also the original trap characteristics. And that case I would send kudos to AMD. Will test tomorrow. Jan
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