Il ven 23 set 2022, 20:26 Peter Xu <peterx@xxxxxxxxxx> ha scritto: > > > Someone will show up with an old userspace which probes for the sole > > existing capability, and things start failing subtly. It is quite > > likely that the userspace code is built for all architectures, > > I didn't quite follow here. Since both kvm/qemu dirty ring was only > supported on x86, I don't see the risk. Say you run a new ARM kernel on old userspace, and the new kernel uses KVM_CAP_DIRTY_LOG_RING. Userspace will try to use the dirty page ring buffer even though it lacks the memory barriers that were just introduced in QEMU. The new capability means "the dirty page ring buffer is supported and, by the way, you're supposed to do everything right with respect to ordering of loads and stores; you can't get away without it like you could on x86". Paolo > > Assuming we've the old binary. > > If to run on old kernel, it'll work like before. > > If to run on new kernel, the kernel will behave stricter on memory barriers > but should still be compatible with the old behavior (not vice versa, so > I'll understand if we're loosing the ordering, but we're not..). > > Any further elaboration would be greatly helpful. > > Thanks, > > > and we > > want to make sure that userspace actively buys into the new ordering > > requirements. A simple way to do this is to expose a new capability, > > making the new requirement obvious. Architectures with relaxed > > ordering semantics will only implement the new one, while x86 will > > implement both. > > -- > Peter Xu >
