On Mon, Sep 19, 2022 at 2:35 AM Like Xu <like.xu.linux@xxxxxxxxx> wrote: > > From: Like Xu <likexu@xxxxxxxxxxx> > > If AMD Performance Monitoring Version 2 (PerfMonV2) is detected > by the guest, it can use a new scheme to manage the Core PMCs using > the new global control and status registers. > > In addition to benefiting from the PerfMonV2 functionality in the same > way as the host (higher precision), the guest also can reduce the number > of vm-exits by lowering the total number of MSRs accesses. > > In terms of implementation details, amd_is_valid_msr() is resurrected > since three newly added MSRs could not be mapped to one vPMC. > The possibility of emulating PerfMonV2 on the mainframe has also > been eliminated for reasons of precision. > > Co-developed-by: Sandipan Das <sandipan.das@xxxxxxx> > Signed-off-by: Sandipan Das <sandipan.das@xxxxxxx> > Signed-off-by: Like Xu <likexu@xxxxxxxxxxx> Reviewed-by: Jim Mattson <jmattson@xxxxxxxxxx>
